CMOS Image Sensor and FIFO ground

[rv213]

I have a CMOS image sensor with both digital and analog circuits. The sensor has an VAAPIX (analog pixel power) and an internal ADC. I added a FIFO to buffer the data. Pixel clock goes to write clock of FIFO.

The pcb has an analog ground plane and a digital ground plane.
What ground plane should the FIFO gnd's be connected to?
Will timing be screwed if connected to wrong ground?

If it helps:
Image sensor is Micron part# MT9T001P12STC.
FIFO is Cypress part# CY7C4251V-15AC.

Thanks,
Roberto

 

[melc]

You could screw it even if you connect to the right ground.
FIFO is a digital device, theoreticaly should be supplied from the logic ground.
The problem is the point you're using for connecting the analogic ground with the digital ground. My experience tell that need to design many connecting points between those two grounds and connect the appropiate one (one or more) for achieving the minimal noise level on the analogic ground.
Use multipe SMT parts as 1206, 0805 or 0603 and connect a zero ohm resistor in the place which gaves you the better SNR.
These sort of designs need usually at least one PCB revision. If you're able to do it in zero revisions, means that you're an experienced designer...

 

[dasong]

I am a newman for cmos sensors design ,who can gave me some useful message for it,thanks