Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

cmos fabrication (layouts)

Status
Not open for further replies.

aishu.r

Newbie level 2
Joined
Sep 8, 2012
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,291
hi,

I too have a similar question. Anyone please help.

Why do we have nwell at n-substrate? if it is for reducing leakages, we have pselect there. then whats the need for nwell.

please tell me in detail. i am getting confused.
 

aishu.r

Newbie level 2
Joined
Sep 8, 2012
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,291
As far as i know.. We can use both nwell n pwell. But when we are working on TSMC, we go for nwell. What is the exact purpose of using nwell.

Please answer my question.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top