clock tree building in synthesis

[jaya sree]

hai ,
will clock be built in synthesis ( pre pnr stage)

during cts stage in pnr , i am seeing tool is deleting many preexistinng clock buffers and inverters) . does that mean clock was built during synthesis ?

 

[rca]

The first phase of a cts is to removed every buffers and inverter, only mux and gate elements are preserved.
In the second phase, the clock tree is realize.
During the synthesis, only some gated-latch could be added.

 

[jaya sree]

o.k . but when did tool insert these buffers and inverters ? before pnr ?