Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

clock recovery from embedded clock data stream

Status
Not open for further replies.

Sanangpuria

Newbie level 2
Newbie level 2
Joined
Mar 19, 2013
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
1,292
let say I have a transmitter and receiver and data is transmitted using embedded clock data line.

Than how receiver will extract clock signal from embedded stream. So that it can sample correct data without any issues.

As per My understanding there will be a PLL at receving side which will take input as a reference clock which is same for both transmitter and receiver.

and that PLL will generate a output signal which will act as clock signal for receiver.

Pls suggest me whether I m correct or not or Is there is any other method for clock recovery.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top