circuit
Full Member level 2
Hi all,
Two chips in my circuit, one takes in a clock 0-2.4V and other 0-3V clock. I have a single external clock input which is a 0-3V clock. I am using 74VHC04 hex inverter(I am emulating this part of ckt from analog devices EB and hence this inverter. U! and U2 are inside a single chip) from fair-child semi. I am attatching the ckt below. The timing is not a problem since I have already analysed that.
I am giving a 0-3V clock as shown and am I right in giving a 2.4V supply to the inverters below so that the output would to 0-2.4V. I checked the data sheet as far as the VIH min and it satisfies that. It doesnt say anything about VIH max( Can it be greater than supply voltage as in the case here) ?
I checked for 0-3V input clock and 3V supply and that is fine. Thanks
Two chips in my circuit, one takes in a clock 0-2.4V and other 0-3V clock. I have a single external clock input which is a 0-3V clock. I am using 74VHC04 hex inverter(I am emulating this part of ckt from analog devices EB and hence this inverter. U! and U2 are inside a single chip) from fair-child semi. I am attatching the ckt below. The timing is not a problem since I have already analysed that.
I am giving a 0-3V clock as shown and am I right in giving a 2.4V supply to the inverters below so that the output would to 0-2.4V. I checked the data sheet as far as the VIH min and it satisfies that. It doesnt say anything about VIH max( Can it be greater than supply voltage as in the case here) ?
I checked for 0-3V input clock and 3V supply and that is fine. Thanks