Clearing Block ram in verilog HDL

[vickyuet]

I had made a dual port BRAM (separate port for read / write ).I want to add an input that clear the BRAM when its high....

How can I do this for 256 x 8 Bram so that my code is synthesis able and could be modeled in hardware/Technology....one approach is to use for loop but requires more hardware and computation

// Approach 1
if ( clear_bram )
begin
for(i=0;i<RAM_WIDTH-1:0;i=i+1)
bram_init <= 0 ;
end
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

Whats the alternative Is there any other possibility so that I can clear BRAM easily with clear input signal.I mean just like a resister when its reset...Similar to this though this piece give an error....Suggest plz...:idea:


if ( clear_bram )
bram_init <= 8'd0; //This does not works and gives error

REgards,:roll:

 

[FvM]

You need to refer to the hardware specification of your FPGA. They ususally don't provide a clear option for block RAM. Besides a power on reset, you have only the option to write zero to the RAM, one address per clock cycle. A for loop can't work.

 

[vickyuet]

Yes you are right but Ineed to store an image in BRAM and it must be cleared to zero before any operation.I got ur point one write per clock cycle but in case of large BRAM it will increase resources,decrease speed considerably.....any other idea....

 

[FvM]

If you intend to overwrite the RAM with new data, why do you want to clear it before?

 

[vickyuet]

because of my design.....
1-I need to calculate histogram of an image.For that I need to store an image in BRAM,store calculated histogram of image in another Bram that Bram needs to be cleared before writing any data.....
2-To add more Why....I need to count the frequency of every image pixel value for histogram ....for example in gray scale image we had values (0 t0 255) I need to count in image how many time the particular value repeats and increase that count index every time upon scanning that value and finally writing it to that memory index so initially BRAM should be cleared to avoid garbage value......

I discuss it with my friends he suggested me to clear Bram from .coe file (all zeros).What do u say.....

 

[FvM]

Clearing he RAM by a file is available only on power on reset. Without an initilization file, the RAM should be initialized to all zero, at least it's the case with Altera block RAM. But I understood, that you want to have a clear option not only on power on. In this case, you need an address counter to access all RAM locations one by one. This is not a big thing, but takes some clock cycles.