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Class E Power Amplifier Questions

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promach

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I have some questions about Class E Power Amplifier

1) From page 183 of Advances in Electronics, Communication and Computing ,

(a) why Maximum output power is calculated as 0.577 Vdd2 / R ?

(b) What does it mean by Vgs (min) = 5% of V dd = 0.09 V and Vgs (max) = 7% of Vdd = 0.126 V. Therefore Vgs value will be in between 0.09 and 0.126 V. ?

6rHINfq.png




2) From Figures 4 and 5 on page 3 of A Class-E RF Power Amplifier with a Novel Matching Network for High-Efficiency Dynamic Load Modulation ,

(a) how to determines values of all the values of capacitors and inductors of both the input and output impedance matching networks ?

(b) how to use LTspice to simulate if it does not have smith chart plotting capability ?

(c) How to bias the two pull-up inductors (Lrf, Ldriver) and two resistors (Rb1, Rb2) ?

(d) How does the proposed digitally-controller matching network works ?

Lp53HW6.png
 

*** 0.577 is coming-probably-from voltage waveform and its Fourier coefficient at first harmonic.( likewise half sinusoidal waveform)
*** Class-E amplifiers are switched mode circuits and bias current does not flow when it's in quiescent mode.Therefore the efficiency is very high..
consequently the bias should be much below then threshold.Small amount of bias voltage does not allow the current to flow but it improves the acceleration in the gate.( capacitance pre-charged )
 

    promach

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*** 0.577 is coming-probably-from voltage waveform and its Fourier coefficient at first harmonic.( likewise half sinusoidal waveform)

Wait, how exactly is 0.577 related to Fourier coefficient at first harmonics ?

bias should be much below then threshold.

I suppose this means the mosfet transistor must be in sub-threshold operating region ?
 

Hi,

Maybe M1 never actually turns on, VGS too low?, and/or/so M2 never turns off. Could try lowering M1 pull-up and/or placing a pull-down resistor on M2 gate.
 

I doubt that the transistors have been reasonably sized, I see default minimal dimensions. Did you ever look at transistor currents?
 

I understand that both the T and pi impedance LC networks need to be tuned.

I Iooked at Nathan Sokal original document about class-E power amplifier : Class-E High-Efficiency RF/Microwave Power Amplifiers: Principles of Operation, Design Procedures, and Experimental Verification
https://sci-hub.tw/https://link.springer.com/chapter/10.1007/0-306-47950-8_14
but there is not much information about RF impedance tuning

Besides, there are also parasitic capacitance arising from the two NMOS mosfets.

How do I use ".net Vin I(R3)" to do impedance matching inside LTSpice ?
 

Your components' values are completely out of design reality..
For instance, 1 MHz Input Frequency will be short at 1nH Inductor, 1pF Capacitors are too low for that frequency..
Others are also nonsense.. Class-E Power Amplifiers are pretty sophisticated circuits that cannot be designed by placing arbitrary components.
 

I am not good at RF impedance matching.

Someone commented that I should never match the output for maximum power transfer (conjugate matching) because that inherently limits the efficiency to 50%. Any advice about this statement ? Why this limits to 50 percent efficiency ?
 

I am not good at RF impedance matching.
Someone commented that I should never match the output for maximum power transfer (conjugate matching) because that inherently limits the efficiency to 50%. Any advice about this statement ? Why this limits to 50 percent efficiency ?

You misunderstood the Matching/Power relationships.
Power Amplifiers are designed for mainly 3 targets.
-Max. Delivered Power
-Max. Efficiency
-Max Power Gain.

Those three target cannot be achieved simultaneously.Therefore especially Output Matching is designed so that one those target can be achieved.
Conjugate Matching is valid only and only under Small Signal Operating Condition because Operating Point is not shifted much.
But Load Pull technique is used for those targets to be obtained and Matching Circuit is designed in that way.
E-Class is one the most difficult to design and understand family.You must read so much to understand the Class-E phenomena
Andrei Grebennikov has few good textbooks on this subject. Get his' textbooks ..
 

    promach

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As far as I understand, the output impedance is calculated according to Eq. 3., with Vdd=28, Pout=5W and QL=5

1601729745710.png
 
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    promach

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What does it exactly mean by "loaded" quality factor QL ?

JKTK62r.png
 

It's mentioned in the paper. The quality factor of the matching network is a design parameter.
 

The following screenshot shows some information about harmonic suppression, but I could not find in the paper on further explanatory note about the reasoning of the choice of QL with regards to bandwidth.

rCHJMi9.png
 

Harmonic supressions requirements are set by radio and EMC regulations, e.g. FCC. Usually, additonal flters will be required to achieve a state-of-the-art harmonic suppression, e.g. -40 dBc. Bandwidth requirements are set by the application. Without referring to an application, there are no rqeuirements.
 

I mean theoretical explanation about the relationship between QL and bandwidth
 

Usually, Q of a resonator is defined as fcenter/bandwidth.
 

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