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Good question - I think, it´s a matter of interpretation.
If the input voltage further increases and the output waveform more and more exhibits nonlinear distortions the mean value of both halfwaves will deviate from zero. This remaining mean value can be regarded as a dc value which adds to the dc bias. But on the other hand, for my opinion it also can be seen as a part of the output signal.
practically class AB amplifiers can be divided in to two stage
gain stage and driver stage. In the driver stage push & pull section controlled based on the voltage at the gain stage. ( this may be your interpretation of change in the bias)
But this change is due to the input and can be considered as input signal for the driver
One of the reasons I am interested about this, is regarding active biasing. I have found some articles, that say that active bias can be difficult to achieved with class AB amplifiers. I have attached a paragraph from an article discussing this.
I have seen different ways to do active bias. One is where we use a PNP-transistor and some resistors to fix the DC bias for a FET as an example.
I can not see a problem why this should not work, only if it is high power and the drain current increases a lot. So the voltage Vds start to drop significantly and therefore give distortion.
The article says active biasing can prevent the amplifier to go into class AB region...how?
the schematic posted here is a typical class A amplifier. As we see there is a passive element for pull up. The distortion mentioned in the class AB amplifier is due to the transition between pull up and pull down devices (active). this distortion can be minimized to a grate extent by fixing the proper operating points for both devices(pull up and pull down )
Refere analog electronics from "allen holberg" you will get some interesting stiff on class AB operation
I have used an op-amp feed-back circuit to stabilize class AB bias. With the high gain of an op-amp you can make the drain sense resistor very small (~ 0.1 ohms). While it worked great and holds the bias rock-steady I never used it in production since a thermistor based circuit is simpler, more reliable (no active parts), and truly compensates for temperature effects. However this does not use feed-back. You must measure FET quiescent drain current over temperature and design the thermistor network to compensate.
The biggest variation in lots is threshold voltage, and that is easily adjusted with a potentiometer. Once quiescent bias is adjusted at room temperature, the drain current vs. temperature curves are nearly identical, so you only need to tweak your thermistor network once.
One problem you have to watch for in active bias is gate current. As RF drive increased so does drain current, so the active bias reduces gate voltage to counteract. This increases breakdown between gate and drain thus increasing gate current. Too much gate current can degrade and damage your FET. So a "stiff" active bias, such as an op-amp connected directly to the gate, is bad since there is no current limiting. Adding resistance between the gate and driving source will "soften" the bias and limit gate current, of course then you loose active bias. It's a trade-off.
Check out "Radio Frequency Transistors" by Norm Dye and Helge Granberg ISBN 0-7506-9059-3 for several examples of active bias for BJTs and MOSFETs. The MESFET will be a cross between the two since it is voltage controlled but still has gate current.
You can put your amp in the oven with a thermocouple attached near the transistor flange. Sweep the temperature and adjust gate bias as needed to maintain constant IDQ. You have a data set of VG vs. Temp for constant IDQ.
Then use a thermistor network to generate that gate voltage. You can use a simple voltage divider with a thermistor in one of the arms, or a voltage regulator with the thermistor in the feedback path; I have use both types It may take two thermistors depending on the shape of the VG vs. Temp curve. You can use a spread sheet to compute the mean-square error between the desired curve and the network response, then use the "solver" function in Excel to minimize the error. You can even use a linear circuit simulator and it's optimizer, just use degrees K for temperature and call it frequency. Usually it's just easy to tweak by hand.
Just keep in mind the bias circuit must sink and source current to the gate so it cannot be too stiff. I'd keep your current potentiometer circuit and try adding a thermistor to it. You will still need to set each potentiometer to set the DC offset of the VG vs. temp curve, but the shape of the curve will be the same for all the transistors.
To account for the VT variation you will need to use the feed-back type stabilization shown in your picture, or some variant of that such as using an op-amp to do it. Maybe there is some other way but I don't know.