Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Block by block, find "what it wants" (PTAT, CTAT, PSRR, PVT
variation, etc.) to get the block's performance desired, then
"make it so". That part may be what you're asking (?) but it
follows from requirements and practicalities, and leans on
your "bag of tricks" (various references, mirror architectures,
variously suited to a particular tecnology, headroom, detail
attributes etc. - try 'em, pick one).
As I experiment with an idea I sometimes start out by using analog-switches. These can be turned on-and-off easily by a clock signal.
When I'm ready to substitute transistors, I look at each switch and try to figure out whether it should be PNP or NPN. Often PNP switches more easily when placed at high side, with bias current flowing down to nodes of lesser volt levels.
Later I may try the opposite type in some places, to see what works better.
I try to find a convenient spot to tap for a bias signal. If I'm lucky I can arrange to bias a transistor from its own emitter or collector leg. Or from ground.
Usually bias resistance must be experimented with, hence I adjust it via potentiometer. (This is feasible using Falstad's animated interactive simulator. Readouts respond immediately.)
The emitter resistor is not always necessary although when included it plays a role in the bias network. It provides a kind of feedback while at the same time reducing gain.