choosing SAR vs sigma delta ADC for my application

[garimella]

I have to develop a power meter, where I need to sample voltages and currents simultaneously. Inputs are 50Hz signal and accuracy requirement is around 0.1%. Should I choose sigma delta or SAR? and why?

 

[KlausST]

Hi,

I´ve done something similar. With delta sigma ADCs. Works great.

For a standard power meter I´d recommend ready to buy power metering ICs. Relatively simple to use, precise, do what they should do.

For my application a had a timing requirement for very fast input-to-RMS value on the one side but low ripple on the other side.
The ready to buy solutions were not satifiying in this regard. Thus I've chosen to do my own arithmetics.

The benefit of delta-sigma ADCs:
* high resolution
* low DNL
* cheap
* due to oversampling: very simple antialiasing filters

Mind: you need a continous, fixed, low jitter sampling rate

Read the datasheets carefully.

For more detailed informations you need to provide more detailed requirements.


Klaus

 

[FvM]

There's a large portfolio of energy meter analog front ends from Analog Devices, all using SD ADC.

 

[danadakk]

You could consider PSOC, some versions have 2 SARs on them, although PSOC
also has a lot of mixed sig stuff on it, like a S/H so that a single SAR or a DelSig
(also on many parts) plus analog mux on SAR coul;d be used. Note precision
Vref also on part.

The SAR is 12 bits, DelSig to 20 bits. Note DelSig can common mode to 100 mV outside
its rails making it easy to do high or low side current sensing with a shunt.

A RMS capability using an OpAmp (also onchip) and timed sampling. All onchip.

Measuring an RMS value on a PSoC5, Part 1: Signal Acquisition - Planet Analog

Measuring an RMS value on a PSoC5

www.planetanalog.com

Take a look here for some general info on PSOC, post # 5

https://www.edaboard.com/threads/low-cost-socs-recommendation-for-a-new-project.396158/#post-1702130

Regards, Dana.

 

[garimella]

I have been looking for SD ADC but with SPI Interface, will it not slow down the process?

 

[KlausST]

Hi,

How can we know? We don't have any requirements...
Usually a design starts with deciding the requirements.
Currently we have:
* signal frequency: 50Hz (I guess mains frequency with a range of 49.8Hz to 50.2Hz, undistorted sine)
* accuracy 0.1% (I guess 0.1% FS)

0.1% is rather exact. Thus your definition "what" should be that exact and "how" you wanted to measure and calculate it.

An example: 50Hz pure sine amplitude can be exactly measured and calculated with 3 measurement values per fullwave.
If it is not pure sine ... there are overtones.
You might be interested in the 50Hz amplitude only or the amplitude of one or many overtones.
You might be interested in the RMS value .... up to which overtone? With or without DC...?

A good approach is: Imagine you give the definition to another engineer. You design a measurement device, the other engineer designs a measurement device. After both devices are finished you connect both to the same signal source and both should show the result, identical with just 0.1% deviation.

A resolution of 0.1% is simple
A precision error of 0.1% is more difficult, but still relatively easy
But an accuracy error of 0.1% is rather difficult, especially with AC signals

Klaus

 

[danadakk]

I have been looking for SD ADC but with SPI Interface, will it not slow down the process?

PSOC is both a processor and analog, so as Klaus points out with no
performance goals described, like mega samples/sec for SAR,
we cannot be of much help. Attached is a component list for PSOC.
In PSOC lingo a component is an onchip resource.

If you have a block diagram of design, with basic performance parameters,
that would help us help you.


Regards, Dana.