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Check undesired substrate mode...

vlsi_design2

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Hi,
I am designing a CPW transmission line in CMOS at millimeter-wave frequencies (>60 GHz). I dont have any gnd plane shielding but only the substrate at the bottom. There is a chance that substrate mode starts affecting. How to check this in an EM simulation tool if any unwanted mode is getting triggered? Any visual way to check this using current density etc.?
 

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