Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Check undesired substrate mode...

Status
Not open for further replies.
V

vlsi_design2

Member level 1
Member level 1
Joined
Nov 30, 2014
Messages
39
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,288
Activity points
1,588
Hi,
I am designing a CPW transmission line in CMOS at millimeter-wave frequencies (>60 GHz). I dont have any gnd plane shielding but only the substrate at the bottom. There is a chance that substrate mode starts affecting. How to check this in an EM simulation tool if any unwanted mode is getting triggered? Any visual way to check this using current density etc.?
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top