Characteristic Impedance for single ended traces in 4 layer PCB

Hello,

I have some questions regarding characteristic impedance (Z0). The characteristic impedance depends on trace width (w), trace thickness (t), outer dielectric thickness (h0), center dielectric thickness (hc), and relative dielectric constant (er). The total PCB thickness according to these parameters will be then (t + h0 + t + hc + t + h0 + t).

Q1- The characteristic impedance (Z0) decreases by increasing the trace width (w) for a given trace thickness (t), given substrate thickness (h0 and hc) and given relative dielectric are constant (er). Is this true ?

Q2- If for a given parameters for 4 layer PCB the characteristic impedance (Z0) is higher then the target characteristic impedance then how to change the parameters other then trace width (w) to achieve target characteristic impedance (Z0) ? specifically how to change (increase or decrease) substrate thickness (h0 and hc) if we do not want to increase trace width (w) to decrease characteristic impedance (Z0) ? and trace thickness (t), and relative dielectric (er) are constant are already constant.

Hi,

first of all: this only works if you have a good solid (without cuts) GND plane (or any other good HF signal plane). A copper fill will not work.

Q1: refer to the formula(s) ... they tell you.

Q2: you (the PCB designer) are responsible for layer stacking and the thickness of copper, prepreg, core .. and the material.
Consult the PCB manufacturer if your layer stacking and the dimensions are correct (easy to produce).

Klaus