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Channel length modulation question in CMOS

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wylee

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As I read Phillip Allen's book on CMOS Analog Circuit Design,

I found out that before designing any op amp, it is advisible to:

:arrow:
Choose the smallest device length (L) that will keep the channel modulation parameter (lambda) constant and give good matching for current mirrors

:?: Referring to what he said, taking an examp of 0.18um IBM CMOS process,
it there anyway for me to run a HSPICE simulation for find out what is the suitable L (um) value?

:!: As i recalled, channel modulation reduces with increasing device length...but how to choose an approriate value, is there any procedure?
 

silicon

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1. I think you can run a sinulation to obtain V-I curve of a MOS. Form the curve, you can find the lamda. Larger Length results in small lamda (effective early-efect fetor).

2. As I know, I always treat L<4um as short-channel device. So, if you want to ignore channel length modualtion, set length of mos larger than 4um.
 

    wylee

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tucura

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In most applications L= n * Lmin with n=3-5 is adequate. For very
large gain or matching n=10. Hspice output provides mosfet
parameters for each device. Look for 'go' and may be 'gm'
In most applications the required 'go' is related to some 'gm'.
For matching, increasing n above 10 doesn't improve results.
In this late case, w also has to be increased (x10) from the minimum.
 

L

layes

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forget the lamda
it is not good for design
2-3 * minimum length is enough
 

radiohead

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One way to do it is to plot the threshold voltage in function of the channel length of a single transistor. Hspice and other simulators have possibilities to derive the transistor parameters directly without any manipulation.

You will see that for an NMOS Vth will go up and will stay quite constant for lthe length bigger than 3* the minimum length. This means that little mistakes in the length because of process variations will not affect Vth much and like that you get good matching!
 

selvaraja

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you can plot id vs vds for different L value. if the drain current indicates constant value for vds is greater than vgs-vth that will the closses L you can choose.
 

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