channel charge injection of Transmission Gate

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abcyin

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Hi, all,

I'd like to reduce the channel charge injection of the transmission gate, I know that this effect could be reduced by selecting the right size of NMOS and PMOS carefully, but this is only for a specific input voltage. When the input voltage changes, the channel charge injection still suffers the output, so could anybody give me some hints on how to further reduce this issue?

thanks in advance.
 

I cannot quickly find a reference to it, but you can use dummy transistors to try to cancel it out. In theory I think they should be half the size although due to differences between drawn & effective widths/lengths they values may work out slightly different. See Q69/Q70 in this diagram.

Keith.
 

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You can compensate charge injection -for a given operating
point- by cancellation, but common mode voltage position
becomes common mode charge. So one trick is, try to do your
switching at virtual ground points. Or at low impedance nodes
where charge has somewhere to go. Or make FET gate
overdrive/underdrive fixed values that track the more sensitive
of the two nodes, so that cancellation can be done better
(this can be elaborate and cost power, but it improved one
JFET S/H I worked on, big time for hold pedestal).
 

Another solution is to bootstrap your switch. with TG switch or with NMOS/PMOS channel charge depends on the input voltage. With the bootstrapping you can atleast make the it independent of input voltage and then make it appear as common mode signal to the succeeding stage OTA so that it gets rejected.
 

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