achaleus
Member level 5
Code:
always @ (posedge clk_153)
begin
if (reset)
start_reading <= 1'b0 ;
else
begin
if(condition1) // once this condition occur start_reading is always high
start_reading <= 1'b1 ;
end
end
always @ (posedge clk_102)
begin
if (reset)
read/_en <= 1'b0 ;
else
begin
if(start_reading) // once this condition occur start_reading is always high
read_en <= 1'b1 ;
end
end
does start reading need cdc as start_reading signal is high always once condition is executed