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Can't transfer logic thinking into hardware descriptive VHDL

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veiledcavalier

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how to become a vhdl guru

elsalam alykom,

i have a problem

so as VHDL is a hardware descriptive language i can't transfer my logic thinking into hardware description,
previously using µC i was thinking about smthing then us ethe programing language to descripe it as it is.

thanks for all.
 

time dimensioning in vhdl

If I understand your question properly, my answer is:

yes, with VHDL you dont just translate your thought-out solution to a programming language. You have to think which circuit will implement your solution properly. then with VHDL you can describe the circuit ina somewhat abstract fashion and use synthesis to arrive at the actual circuit.

You have to have a fairly good idea about the sequence of operations and the operations in each step..very basic thing you have to keep in mind that unlike a sequential programming language, in a circuit everything happens simultaneously.
In other words VHDL is a concurrent language, like real circuits are.

-b

Added after 19 seconds:

If I understand your question properly, my answer is:

yes, with VHDL you dont just translate your thought-out solution to a programming language. You have to think which circuit will implement your solution properly. then with VHDL you can describe the circuit ina somewhat abstract fashion and use synthesis to arrive at the actual circuit.

You have to have a fairly good idea about the sequence of operations and the operations in each step..very basic thing you have to keep in mind that unlike a sequential programming language, in a circuit everything happens simultaneously.
In other words VHDL is a concurrent language, like real circuits are.

-b
 

vhdl code for mux & demultiplexer

Coming from the Software Engineering background (long time and various
lang) I had the same issue. Overcoming the 'sequential code flow'
thinking pattern and learning to think in terms of 'simultaneous
signals' is indeed the biggest hurdle. (Note the use of *is*since i
still get mixed up sometime.

But good thing is then I realized that in practical situation the
'programmer' me helped more to solve and implement solutions. We need to
remember that the idea of VHDL is to solve/implement hardware in the
terms of 'programming' domain. All I am trying to say that soon you will
realize that the 'programmer' you is helping the 'design engineer' you
in a GOOD amount.

Now from my experience I will give you me trade secrets....

1. A design is always broken down in components. So first functionally
modularize the design pieces that makes up the complete design. Its is
generic to both Hardware/Software. Everybody knows this.

Ex: Socket Library packaging comms capablities for TCP/IP based app.
RS232 component for HW based comms design.

2. Every HW component will have a Input, Control (What to do with the
input) and Output (function of Input + Control). In programming a
'function' is that. You give 'data' and some 'flag' as parameter of the
function and you get output in terms of return or changing variables
inside of the function. Again simple fact.

Now in VHDL, while defining Entity think in terms of function prototype.
Define your input and flags. Also define the output. Moving to
'architecture' think it in terms of writing the function body.

Now the important bit of it......

Comes the HW philosophy of it. For VHDL do assume that the statements in
the architecture body are executed one after another. Forget for a
moment that you know programming. Now once your head is clear...

AND you know the fact that in hardware everything is a triggered reaction to a change in current/voltage/(bit status) in the connected input or control wire.

(Note for later: Look up some basic example of Synchronous and Asynchronous components


So when you start writing the body of the architecture,

Make sure you have a 'sensitivity' list defined which will define the input/flags that your component is sensitive to. Changes in any input/flag will not make your component to recalculate/update/take action.

Now in the order of importance of the control build up "if else block".
Exaple:

if reset control is set to 1 my output goes to 0 else I do things in the rising edge of the clock.

Inside the condition blocks write statement to do some work. But note that all the statement in that block happens in parallel to each other.

And now comes the NASTY part of it...

(lets say a = 10, b = 2, X = 77, Y = 0)

X = a + b; //a=10, b = 2, X=77
Y = X;

Question is Y=?

If you get the next part or will become 'GURU' in VHDL :p


In sequential programming, a and b is added and the result is assigned to X. So X will have 12. In the next statement X is assigned to Y. So Y get 12.


But in VHDL, all the statement in a block runs in parallel. So

1) You are adding a and b and assigning 12 to X. Considering the time dimension you have original value of X overwritten by 12 after some fraction of time which is required for addition operation.


2) AT THE SAME TIME IN PARALLEL to 1, you assigned Y to X and therefore X value of 77 is assigned to Y


If you haven't got this part, then i suggest do all that required before you jumping into any kind of VHDL programming. This is THE barrier that you need to break.


NOTE: I found reading on the VHDL simulation (+Delta Cycle) helped me a lot. If you know how the simulator is simulationg then you know how it works.
 

Re: logic of VHDL

vhdl is a language of hardware, is not circuit 。somethings can not be achieve by circuit.
 

Re: logic of VHDL

veiledcavalier said:
elsalam alykom,

i have a problem

so as VHDL is a hardware descriptive language i can't transfer my logic thinking into hardware description,
previously using µC i was thinking about smthing then us ethe programing language to descripe it as it is.

thanks for all.

why not u mention ur idea... then we try to help u how to convert to hardware/logic in VHDL...

it was the best thing i ever learn when i was in my university...

regards,
sp
 

logic of VHDL

Well, I would say: start with learning digital logic basics: gates, counter mux, demux, etc... Havig software background can create a lot's problems, when you trying to solve harware problem with software mind. Don't take me wrong design could works, but question whould be how mutch resourse it will take and how fast is Fmax. All digital desing can be trncffered back to the simple gates...
Also brush your electronic knowledge, you can do best FPGA design on the world, but it is not going to work, because your hardware is bad, and you do not have luxury of someone who is going to do it for you!!!!!


Good luck and welcome to the club

Added after 16 seconds:

Well, I would say: start with learning digital logic basics: gates, counter mux, demux, etc... Havig software background can create a lot's problems, when you trying to solve harware problem with software mind. Don't take me wrong design could works, but question whould be how mutch resourse it will take and how fast is Fmax. All digital desing can be trncffered back to the simple gates...
Also brush your electronic knowledge, you can do best FPGA design on the world, but it is not going to work, because your hardware is bad, and you do not have luxury of someone who is going to do it for you!!!!!


Good luck and welcome to the club
 

Re: logic of VHDL

u can make behavioral models for ur design with VHDL to test the algorithm of ur design...to see if it works out correct or u need some changes...but this isn't the synthesizable code

u can write RTL models (which are the synthesizable codes that can be transfered into hardware for real) then have them synthesized into a netlist which presents the hardware that will be implemented

u can also write structural models, where u have the gates connected as u want directly...but this is usually for small and simple designs

so try to think in steps...and u should go through this hierarchy at first but with experience u will be able to think hardware directly and how to reach what u want at once:)

regards,
Salma:)
 

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