taskmn57
Newbie level 5
Hi all,
I am using keil software for my software development on a
custom board based on LPC2368 microcontroller and 12.00MHz
crystal clock on board.
The main and big problem that I have is setting the PLL
and CPU clock frequency correctly.
I used MSEL:11 and MSEL:1 and from equations in LPC23xx,
I expect to have a PLL output frequency of 144MHz and with
the clock divider of 2 I assume that I am feeding my CPU with
72MHz clock - which is the highest input clock.
There are some strange issues and differences between what I set
here and datasheet recommendations that I summarize them below:
1- According to the restrictions an obligations in datasheet,
PLL output frequency must be in the range of 275MHz to 550MHz,
while when I change MSEL, NSEL values to set the output clock
In that range, my microcontroller will stop and never can work
With it - consider that in this case I use appropriate CPU clock
Divider to get 72MHz CPU clock - even I can't connect to it using JTAG!...
Then I have to compile a new code with that old parameters
- like I said above -and use bootloader to load code to flash.
2- According to datasheet CCLKSEL value in CCLKCFG register must be
Only odd values or 0, as I told above when I set an odd value for CCLKSEL
It will not work any longer, even I can't connect to it using JTAG!...
Then I have to compile a new code with that old parameters
- like I said above -and use bootloader to load code to flash.
With the parameters that I set I expect to set my UART0 baudrate correctly
But never I could get the correct character in Hyper terminal?!!!
Can anybody tell me the reason of these differences between what datasheet
Has recommended and I could get in the real world.
I need urgent help!..
Thanks in advance,
Hossein
I am using keil software for my software development on a
custom board based on LPC2368 microcontroller and 12.00MHz
crystal clock on board.
The main and big problem that I have is setting the PLL
and CPU clock frequency correctly.
I used MSEL:11 and MSEL:1 and from equations in LPC23xx,
I expect to have a PLL output frequency of 144MHz and with
the clock divider of 2 I assume that I am feeding my CPU with
72MHz clock - which is the highest input clock.
There are some strange issues and differences between what I set
here and datasheet recommendations that I summarize them below:
1- According to the restrictions an obligations in datasheet,
PLL output frequency must be in the range of 275MHz to 550MHz,
while when I change MSEL, NSEL values to set the output clock
In that range, my microcontroller will stop and never can work
With it - consider that in this case I use appropriate CPU clock
Divider to get 72MHz CPU clock - even I can't connect to it using JTAG!...
Then I have to compile a new code with that old parameters
- like I said above -and use bootloader to load code to flash.
2- According to datasheet CCLKSEL value in CCLKCFG register must be
Only odd values or 0, as I told above when I set an odd value for CCLKSEL
It will not work any longer, even I can't connect to it using JTAG!...
Then I have to compile a new code with that old parameters
- like I said above -and use bootloader to load code to flash.
With the parameters that I set I expect to set my UART0 baudrate correctly
But never I could get the correct character in Hyper terminal?!!!
Can anybody tell me the reason of these differences between what datasheet
Has recommended and I could get in the real world.
I need urgent help!..
Thanks in advance,
Hossein
