Cannot read microvolt with ADuC 847

[C. Emre ÖZ]

Hi, i use aduc847 and i set chop mode disable, continuous reading about 1.3KHz, internal reference voltage (1.2V) and i set Primary ADC Range Bits unipolar 0-40mv. I tried reading 20uV but aduc result 0. What is the my problem ? Anyone have an idea ?

Thank u.

 

[d123]

Try looking at:
What count divisions does your aduc use? - I'm using a simple IC, the 7106 and at 200mV it's 100uV per count, so minimum 100uV to (hopefully) read (0)001 on a 3.5 digit display.

How is the input range set compared to the ref. voltage? - Maybe the 20uV falls below the minimum input voltage, which you may or may not be able to raise to read that value - That is better explained with an old Intersil application note:

View attachment Overcoming Common Mode Range Issues When Using Intersil Integrating Converters an9609.pdf

 

[C. Emre ÖZ]

I set range 0 to 40 mV from ADC0CON1 (Datasheet page43) RN2-RN1-RN0 registers. And aduc847 is 24bit adc therefore i have read about nanoV but i coudnt read 20 uV. i calculated as that (0.40V/16777215) .

 

[FvM]

I would appreciate a circuit schematic.

Are you applying a ground referred input voltage? In this case, the internal buffer must be bypassed.

Do you manage to read the ADC at higher input voltage and lower PGA gain?

 

[crutschow]

Why have you disabled the chop mode?
The chop mode reduces noise and drift.

 

[C. Emre ÖZ]

i can read high voltage when it is low pga but i have never use without buffer. i must disable chop mode because i need speed, sample speed is 1.3khz

 

[FvM]

Bypassing the buffer has the disadvantage of increasing the input current. But with buffer, the common mode range doesn't reach downto ground.

 

[C. Emre ÖZ]

Hi, when i tried without buffer, i can read low voltage but i face off sinusodial noise . I have find filter for 50Hz

 

[FvM]

I don't see how the missing buffer could bring up 50 Hz hum of about 4 mVpp, it must be in your input signal. There's no means to filter 50 Hz when you rely on kHz data rate. The standard solution would be to average over 20 ms periods, either by setting the ADC sampling rate respectively or in a post filter.

 

[d123]

Hi,
Probably not related to your device or the problem, also your uC must be very different in it's workings, but the 7106/7 and other 71xx datasheets mention, in reference to the clock signal on pins 38 - 40:

"(Note that FOSC is divided by four to generate the TC7106A internal control clock. The backplane drive signal is derived by dividing FOSC by 800).

To achieve maximum rejection of 60 Hz noise pickup, the signal integrate period should be a multiple of 60 Hz. Oscillator frequencies of 240 kHz, 120 kHz, 80 kHz, 60 kHz, 48 kHz, 40 kHz, etc. should be selected. For 50 Hz rejection, oscillator frequencies of 200 kHz, 100 kHz, 66-2/3 kHz, 50 kHz, 40 kHz, etc. would be suitable. Note that 40 kHz (2.5 readings/second) will reject both 50 Hz and 60 Hz."

In case that's where the 50Hz comes from...

 

[KlausST]

Hi,

The scope signal seems like the ADC ANALOG inputs are open.
Connect a low impedance source at the inputs.

Klaus