emememem
Newbie level 2
Hello everyone!
I have a little bit weird question.
I couple of month ago I found some video on youtube (probably, but not necessarily) on the importance of defining properly the common ground plane in simulation of complex packages and RF chips. His main idea was that it is not correct to simulate separably the ASIC and then the package and PCB, and then combining the S-parameters.
The video was about 40-50 mins (maybe 1 hour), it was a recording of a keynote on a conference, so sometimes it showed the slides sometimes the presenter. I think he works as application engineer in some company.
I hope someone else also show this video, now I cant find it in google and I dont have the history in browser from that time frame at all
Thank you all in advance!
I have a little bit weird question.
I couple of month ago I found some video on youtube (probably, but not necessarily) on the importance of defining properly the common ground plane in simulation of complex packages and RF chips. His main idea was that it is not correct to simulate separably the ASIC and then the package and PCB, and then combining the S-parameters.
The video was about 40-50 mins (maybe 1 hour), it was a recording of a keynote on a conference, so sometimes it showed the slides sometimes the presenter. I think he works as application engineer in some company.
I hope someone else also show this video, now I cant find it in google and I dont have the history in browser from that time frame at all
Thank you all in advance!
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