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can you explain to me the behavior of isolation cell?

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mahdinov

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isolation cell

can you explain to me the behavior of this cell?
 

Hi
Isolation Cell: These are special cells required at the interface between blocks which are shut-down and always on. They clamp the output node to a known voltage. These cells needs to be placed in an 'always on' region only and the enable signal of the isolation cell needs to be 'always_on'. In a nut-shell, an isolation cell is necessary to isolate floating inputs.
There are 2 types of isolation cells (a) Retain "0″ (b) Retain "1″
source: http://digitalelectronics.blogspot.com/2007/10/design-elements-of-low-power-design.html
or
for detailed explanation:
Low power methodology manual: for system-on-chip design
By Michael Keating, David Flynn, Rob Aitken, Alan Gibbons, Kaijian Shi

Isolation Cell Usage Tips:
http://synopsysoc.org/magicbluesmoke/?p=136
 

isolation cells are required in all the interface signasls going from one power domain to another, as one power domain may on/off when other is off

basically isolations are required from off domain to on domain, and it should be clamped to a values such tat,, the on domain will sense that the incoming domain is off,,,
and generally thy are like AND/OR gates,, with one of thier input tied to enable.

Added after 2 minutes:

and i dont think so they should be always on cells, its enough if thy got power from recieving side power domain
 

thank's friends

but why isolation cells clamp the output node to a known voltage also what's the role of the enable input?
 

i've been doing some reading on this, the LPPM has lots of good info.

isolation cells serve two purposes:

1) prevent floating outputs from power gated voltage domains from propagating Xs into other parts of the circuit by forcing them to whatever logic level is defined as "inactive". basically an AND gate for active high and an OR gate for active low.

2) prevent floating outputs from causing crowbar currents in other voltage domains
 

yep i agree with denki23,
Isolation cells are meant to send an inactive signla to the active domain,
and if the isolation cell is not there and if the charge on the connected net can make the transistors in the power domain cell to on which may endup in drawing current from VDD to VSS
 

hi denki23,
i need the LPPM book for low power, if you can send it to me plz.
 

mahdinov,
you can download it yourself for free from this link:
**broken link removed**

there's a required registration, but the download is free.
 

but i don't have a Corporate Email so i can't download it.
 

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