can you anybody give me the solution for this threat?

hi, here i have wrote the program for make ascending order of given 5 no... i don't know is it write? but i wrote this in my concept.. and it doesn't enter into the(FSM) loop.. and also what problem in this? help me please........


`timescale 1ns / 1ps

module ascending_test_fsm( input [39:0]in,output reg [39:0]out );

wire [7:0]tmp[4:0];
reg [7:0]a[4:0];
reg [7:0]t1;
reg [7:0]t2;
reg [7:0]t3;
reg [7:0]t4;
reg [7:0]t5;
//reg i;
//reg j;

assign tmp[0] = in[7:0];
assign tmp[1] = in[15:8];
assign tmp[2] = in[23:16];
assign tmp[3] = in[31:24];
assign tmp[4] = in[39:32];

parameter FIRST = 4'b0000;
parameter SECOND = 4'b0001;
parameter THIRD = 4'b0010;
parameter FOURTH = 4'b0011;
parameter FIFTH = 4'b0100;
parameter SIXTH = 4'b0101;
parameter SEVENTH = 4'b0110;
parameter FIRST_1 = 4'b0111;
parameter SECOND_2 = 4'b1001;
parameter THIRD_3 = 4'b1010;
parameter FOURTH_4 = 4'b1011;
parameter FIFTH_5 = 4'b1100;
parameter SIXTH_6 = 4'b1101;
parameter SEVENTH_7 = 4'b1110;
parameter FINAL = 4'b1111;

reg [2:0]STATE = 3'b000;
reg [2:0]NEXT_STATE = 3'b001;
parameter FINAL_6 = 3'b010;

/*genvar i;
generate
//always@(tmp[0] or tmp[1] or tmp[2] or tmp[3] or tmp[4] or a[0] or a[1] or a[2] or a[3] or a[4])
for(i = 0; i<6 ; i = i+1)
begin: ASSIGN
a[7:0] = tmp[7:0];
end
end
endgenerate*/

always@(*)
begin
a[0] = tmp[0];
a[1] = tmp[1];
a[2] = tmp[2];
a[3] = tmp[3];
a[4] = tmp[4];
end


always@(STATE)
begin
case(STATE)
FIRST:

if(a[0]>a[1])
begin
t1 = a[0];
a[0] = a[1];
a[1] = t1;

NEXT_STATE = SECOND_2;

end
else if(a[0]>a[2])
begin
t1 = a[0];
a[0] = a[2];
a[2] = t1;

NEXT_STATE <= SECOND_2;
end
else if(a[0]>a[3])
begin
t1 = a[0];
a[0] = a[3];
a[3] = t1;

NEXT_STATE <= SECOND_2;

end
else if(a[0]>a[4])
begin

t1 = a[0];
a[0] = a[4];
a[4] = t1;
NEXT_STATE = SECOND_2;

end
else begin
NEXT_STATE = SECOND_2;
end


SECOND:

if(a[1]>a[0])
begin

t2 = a[1];
a[1] = a[0];
a[0] = t2;
NEXT_STATE = THIRD_3;

end
else if(a[1]>a[2])
begin

t2 = a[1];
a[1] = a[2];
a[2] = t2;
NEXT_STATE = THIRD_3;

end
else if(a[1]>a[3])
begin

t2 = a[1];
a[1] = a[3];
a[3] = t2;
NEXT_STATE = THIRD_3;

end
else if(a[1]>a[4])
begin

t2 = a[1];
a[1] = a[4];
a[4] = t2;
NEXT_STATE = THIRD_3;

end
else begin
NEXT_STATE = THIRD_3;
end

THIRD:

if(a[2]>a[0])
begin

t3 = a[2];
a[2] = a[0];
a[0] = t3;
NEXT_STATE = FOURTH_4;

end
else if(a[2]>a[1])
begin

t3 = a[2];
a[2] = a[1];
a[1] = t3;
NEXT_STATE = FOURTH_4;

end
else if(a[2]>a[3])
begin

t3 = a[3];
a[3] = a[0];
a[0] = t3;
NEXT_STATE = FOURTH_4;

end
else if(a[2]>a[4])
begin

t3 = a[2];
a[2] = a[4];
a[4] = t3;
NEXT_STATE = FOURTH_4;

end
else begin
NEXT_STATE = FOURTH_4;
end

FOURTH:

if(a[3]>a[0])
begin

t4 = a[3];
a[3] = a[0];
a[0] = t4;
NEXT_STATE = FIFTH_5;

end
else if(a[3]>a[1])
begin

t4 = a[3];
a[3] = a[1];
a[1] = t4;
NEXT_STATE = FIFTH_5;

end
else if(a[3]>a[2])
begin

t4 = a[3];
a[3] = a[2];
a[2] = t4;
NEXT_STATE = FIFTH_5;

end
else if(a[3]>a[4])
begin

t4 = a[3];
a[3] = a[4];
a[4] = t4;
NEXT_STATE = FIFTH_5;

end
else begin
NEXT_STATE = FIFTH_5;
end

FIFTH:

if(a[4]>a[0])
begin

t5 = a[4];
a[4] = a[0];
a[0] = t5;
NEXT_STATE = FIFTH_5;

end
else if(a[4]>a[1])
begin

t5 = a[4];
a[4] = a[1];
a[1] = t5;
NEXT_STATE = FIFTH_5;

end
else if(a[4]>a[2])
begin

t5 = a[4];
a[4] = a[2];
a[2] = t5;
NEXT_STATE = FIFTH_5;

end
else if(a[4]>a[3])
begin

t5 = a[4];
a[4] = a[3];
a[3] = t5;
NEXT_STATE = FIFTH_5;

end
else begin
NEXT_STATE = FINAL_6;
end

FINAL:
begin

out = {t5,t4,t3,t2,t1};
end
endcase
end



////////////////////////////////////////////////////////

always@(NEXT_STATE)
begin
case(NEXT_STATE)

SECOND_2:

STATE = SECOND;

THIRD_3:

STATE = THIRD;

FOURTH_4:

STATE = FOURTH;

FIFTH_5:

STATE = FIFTH;

FINAL_6:

STATE = FINAL;

endcase
end
//end
endmodule

hey bro cud u give me a small hint of what logic u trying to implement so i can help u on it otherwise its difficult to begin with..