With lower hold voltage ESD devices dissipate much less power. As you know P=I*V. So this device can conduct much more current before thermal breakdown. That is why reverse breakdown diodes have very weak ESD protection capability.
As what DenisMark said,
P=V*I, where V is your holding voltage.
Different devices have different Vhold after snapback, so P is different and you may see a larger current that can pass thru for ESD if Vhold is lower. Ppl always want to find Vhold small device to carry more current in DSM process