Zhong Guan
Newbie level 2
- Joined
- Jun 26, 2013
- Messages
- 2
- Helped
- 0
- Reputation
- 0
- Reaction score
- 0
- Trophy points
- 1
- Activity points
- 14
Can interconnection track (wire) between CLBs be controlled by more than 1 blocks?
I'm currently doing a research which requires me to find a unidirectional current path in FPGA.
My question is
Can interconnection track (wire) between CLBs be controlled by more than 1 buffer (CLB output)? If it is controlled by a single buffer, then definitely its current is bidirectional, which is sad for me...
I'm currently doing a research which requires me to find a unidirectional current path in FPGA.
My question is
Can interconnection track (wire) between CLBs be controlled by more than 1 buffer (CLB output)? If it is controlled by a single buffer, then definitely its current is bidirectional, which is sad for me...