Can I realize a DDR memory using FPGA?

[staraimm]

dpram ddr

hi, I want to create a DDR memory (not memory controller) using FPGA. Can you give me some suggestion?

 

[FvM]

ddr emulation fpga

The project doesn't seem to make sense. You may want to clarify it's purpose to motivate someone to help. Generally, the memory capacity of a FPGA is much smaller than even of a small DDR RAM.

 

[staraimm]

I want to built a "memory" based on FPGA, which can be plugged into the DDR2 slot. The memory has the "DDR2" interface. And I can use other "storage" device on it to save the data(not in the FPGA buffer). However, I know that the memory access speed does not really reach "DDR2". It does not matter.

Can I realize such kind of thing? Thanks a lot for your reply.

 

[FvM]

Yes I think, it should basically work. Using dual edge I/O cells (DDIO), you should be able a achieve similar speeds in RAM emulation as with a DDR controller based on the respective FPGA family. Because of the RAM latency, even access to a fast external storage medium (e.g. SSRAM) should work.

 

[staraimm]

I am not familiar with "DDIO" cells. Can you explain more? Or give me some links. Thanks a lot.

 

[FvM]

Consult the datasheets of recent FPGAs with DDR support. The vendors have different names for the DDR specific hardware. DDIO is the A.ltera name.

 

[narfnarf]

However, I don't think you can get reasonable density with the FPGA at least not with a significant hit to performance speed. After all, there is a lot of routing overhead internal to the FPGA (all them switch matrices and what not).

 

[staraimm]

The performance is not cared by me. That's ok if the FPGA can realize the DDR protocol. If the interface can be realized, I think I can use several methods to save the data, such as FLASH or even through ethernet.