I have seen some discussion of how to make the standard
LTSpice FET symbols accept and pass down the netlist,
the geometry params. This is not the default as LTSpice
is meant for "application level" simulations of ICs and
discretes and passives, not IC design. I think (if I recall)
it involved making private MOSFET symbols with more
properties, and a proper netlisting template.
I've picked a different capture and simulation tool-pair
so I did not bother to absorb the info. But at one time
I would have found it useful.
I recommend finding the LTSpice discussion board(s),
maybe start with ltwiki.org and start chasing links.