Can anyone tell me what is imp layer ??

[mujju433]

implayer

I want clear explaination on imp layer can anyone explain me ?

I know why we are using imp layer but i want "what is imp layer"

 

[Fahmy]

what is imp

If you are talking about integrated circuits, Do you mean implantation layer?

 

[mujju433]

imp layer

Yes i am talking about implantation layer

 

[_i386sx25_]

implant layer

IC fabrication starts with a certain type dopped of silicon substrate, lets say p type. To make transsitor on this substrate you need to create n type layer. To make it a certain type of ions implanted by using ion implanter into substrate.

It's better to read vlsi book to get more detailed explanation.

 

[mujju433]

Yes thats true but what is that implant layer ?? i have seen in many books but the explaination is not clear thats why i am asking here so anybody else can explain me ?

I know why we are using implant layer but i want to know what is imp layer i mean p imp and n imp
whats that imp layer ???

 

[Fahmy]

The implant layer defines the regions were the silicon is doped with impurities to form an n-type or p-type silicon . This implantation is necessary for the formation of source/drain regions , poly Si gates and bulk ties. The implant layer have higher importance when it intersects with the active area region (region with thin oxide) . because this intersection only defines the n+ or p+ regions which is used to create transistors and bulk ties . If the implant layer exists in a place where there is no thin oxide , the doping will be light and can not be used in S/D regions or ohmic bulk ties.

 

[mohdfayez]

how important is implant layer when it comes to layout design of standard cells? Is implant layer a part of standard library? any other use of imp layer outside standard cell design?

 

[Fahmy]

how important is implant layer when it comes to layout design of standard cells? Is implant layer a part of standard library? any other use of imp layer outside standard cell design?

implant layer is essential for any NMOS/PMOS transistor , bulk tie ,diodes and some types of resistors .
imlant layer must exist in standard cells or any custom-made layout.