Re: can anybody tell what are the steps to occur serial intr
first you have to consider and setup the serial sfr and then serial ISR. interrupt will be genearted well one byte starting bit to stop bit is recieved including every bit even parity if used.
Added after 4 minutes:
ISR Rountine
Code:
.org 0023h
ljmp serialint
serialint:
jbc ti, transmitted
jbc ri, received
reti
transmitted:
;your code after a byte is transmitted
reti
received:
mov recbuff,sbuf
;your code after a byte is recieved
reti
for initializing serial sfr
serialinit:
anl pcon ,#7fh
anl tmod,#0fh
orl tmod, #20h
mov th1, #baudnum
setb tr1 ;timer 1 running as baud generator
mov scon, #40h
setb ren ;enable serial reception
ret
Re: can anybody tell what are the steps to occur serial intr
hi,
i am getting data from computer at a baud rate of 28.8 Kbps, and receiving in
microcontroller (8052). i have set a baud rate 28.8 Kbps in microcontroller also
to receive. but i am missing some samples in communication.
i think controller take some time in going to serial (or any ) ISR. and for receiving data in SBUF we should make RI bit reset(0) in serial ISR. meanwhile data is continously coming to the controller and in the process we are missing samples.
Re: can anybody tell what are the steps to occur serial intr
A good idea is to implement a buffer ..
How to do this is desribed in this article:
Overview
These routines provide a interrupt driven serial input and output, which is intended to replace CIN and COUT in the Serial I/O Routines. This code uses separate transmit and receive buffers in Internal RAM, so that no external chips are required.
Re: can anybody tell what are the steps to occur serial intr
Hi nikhileshsawarkar
It sounds like you may have a receive buffer overflow problem - do you do any software check for this?
Have you implemented any form of handshake? Hardware or software flow-control.
This will halt the transmitter until the receiver is ready for the next data word.
From my reading of my MCS51 data the SIO hardware has no receive buffer overflow flag - you can loose data without this being flagged (unlike a PIC). You will need to guard aginst this in your design.
As I finished using 87C552 in 1992, I have to refer to the data book. According to the Philips Data PCF83C552, there is an INPUT SHIFT REG. and an S0BUF on the SIO and the data book states:
You may not think that a single byte buffer constitues a buffer, however it does. The SIO would be hard pressed to work without it.
I presume you are talking about a software implemented multi-byte buffer.
Even if a multi-byte buffer is implemented, it cannot guarantee to prevent data loss - it may make it worse because of the software overhead to service it - depending on the other system tasks involved.
If the data stream is so long as to require a multi-byte buffer, I would recommend some form of handshake - that is why it was created.