balajir
Newbie level 4
Hi.,
I need to know how to calculate the area consumed by a module., any module like for example a 5:1 MUX or a adder circuit on an ASIC built using 90nm Technology
Like., i know till this level that.,
Area consumed by the circuit on chip is equal to
(Area Consumed by 1 Logic gate x No. of Gates) + (Interconnect Length x Line width)
But how to calculate the Interconnect length
If someone can give me a detailed explanation it will be useful.... Thnx....
No coding., and all., i just need to know the theory behind calculation of interconnect length., please pass on the references also if anything was used.
I need to know how to calculate the area consumed by a module., any module like for example a 5:1 MUX or a adder circuit on an ASIC built using 90nm Technology
Like., i know till this level that.,
Area consumed by the circuit on chip is equal to
(Area Consumed by 1 Logic gate x No. of Gates) + (Interconnect Length x Line width)
But how to calculate the Interconnect length
If someone can give me a detailed explanation it will be useful.... Thnx....
No coding., and all., i just need to know the theory behind calculation of interconnect length., please pass on the references also if anything was used.
