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CADENCE - SCHEMATIC vs LAYOUT

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lufer17

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I can't get the Assura system to do simulation of the schematic versus layout. I followed all the steps and inserted all the libraries according to the tutorials and what it is to prescribe writing and I can't simulate someone could give guidance. One of the errors says that the pins are not connected in the layout, but they are connected, yes, has anyone been there?

NOTE:

Starting Nvn PreExtraction...

Starting /tools/cadence/ASSURA41/tools.lnx86/assura/bin/nvn /home/mvictor/pdktsmc180/IRUWB_TRANSMITTER/inverter/inverter.rsf -preExtract -exec1 -cdslib /home/mvictor/pdktsmc180/cds.lib
Checking out license for Assura_LVS
Checking out license for Phys_Ver_Sys_LVS_XL
@(#)$CDS: nvn_64 version av4.1:production:dfII6.1.8-64b:IC6.1.8-64b.500.9 02/24/2020 20:04 (vmip-172-18-23-226) $
sub-version 4.1_USR6_HF7, integ signature 2020-02-24-1834
run on mvictor at Fri Jun 5 21:25:37 2020
WARNING (AVLVSNN-10029) : 'filter' command has been converted into 'filterOptions' with the same function. 'filter' command is not supported. Use 'filterOptions' instead.
Reading schematic network
inputting netlist /home/mvictor/pdk/PDK/Assura/lvs_rcx/source.added
Reading layout network
inputting network ./IRUWB_TRANSMITTER/inverter/inverter.ldb
Error: rootCell(or ?cellName) - cell 'inverter layout IRUWB_TRANSMITTER' from the layout does not bind to anything in the schematic.

Finished /tools/cadence/ASSURA41/tools.lnx86/assura/bin/nvn


WARNING /tools/cadence/ASSURA41/tools.lnx86/assura/bin/nvn exit with bad status
WARNING Status 256
WARNING Assura execution terminated
WARNING An error occurred during Nvn PreExtraction.
LVS preprocessing requires a successful run of Nvn.
Assura will now terminate.

WARNING Bad exit from child process .. 0x100


** aveng terminated abnormally **



** aveng fork terminated abnormally **


WARNING aveng exit with bad status
WARNING Status 256
WARNING Assura execution terminated

I can't solve this, I need help please.
 

this line is all you need to focus on:

Error: rootCell(or ?cellName) - cell 'inverter layout IRUWB_TRANSMITTER' from the layout does not bind to anything in the schematic.
 

this line is all you need to focus on:

Error: rootCell(or ?cellName) - cell 'inverter layout IRUWB_TRANSMITTER' from the layout does not bind to anything in the schematic.


I had verified this, before I did the connection tests for each component (output and input elements), they are working before the simulation, but when I do the simulation the same error happens. Is there another way to check the connection or is there another type?
 

I don't know what you mean by simulation, but the error message I highlighted implies the component naming/instantiation is wrong. I would start there.
 

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