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cadence mixed-signal circuit simulation problem of verilog-xl

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Patrick Yang

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Hi guys, I'm using the verilog-XL for mixed signal circuit simulation, however the simulation failed due to following error:
QQ截图20141229184856.png
I found in my cds.lib, the software path definition has some problem,when i use "nchelp -cdslib" to complie the following cds.lib file, it happens as the third pic. Its my first time to use this tool, can anyone help me solve this problem? Thank you in advance!
QQ截图20141229185059.png
QQ截图20141228222222.png
 

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