Cadence MIMCAPS_MM layout

[Debdut]

Hello,

How can I connect a MIMCAPS_MM with Metal Layer 1 (ME1) in Cadence (IC6.1.4) Virtuoso Layout XL. Here's an Image of the schematic and partial layout.

 

[johnjoe]

Picture is missing...

 

[AMSA84]

I have this doubt too. In the technology that I am using, there are two types of MIM: One has the MM description and the other has RF.

The MIM with RF designation is of course to use in RF applications. However, which one can be used for low frequency operation (when compared to RF frequencies) and for filtering?

I know that the RF cap has the sub and a n-well connection I think, or just the sub connection. Where should one connect that pin?

 

[Debdut]

Sorry for the picture, having some problem in uploading !!

AMSA84, are you using UMC180 technology library files?

I used ME1 to ME6 layers and ME1_ME2 via upto ME5_ME6 via to connect the capacitor to the ME1 layer. In the DRC check, it is showing no errors, but in LVS, errors are coming like - Device Mismatch : MIMCAPS_MM is present in schemaic but not present in layout, etc.

Can I use any other capacitors in replacement of MIMCAPS_MM or MIMCAPS_RF that do not have these layer problems?