cadence 180 nm technology

[preethi19]

Hi all i am working with cadence 180nm tech. I am trying to implement a paper that is in 35nm technology. Like i need to give the aspect ratios for my transistors. The paper i am referring to has different aspect ratios not like a standard ratio for 35nm tech.. My doubt is if we use a particular tech we can't just use any width and length of our choice right. I am guessing since in the paper they have taken different values, there must a range within which we can choose for width and length of 180nm techt too.. Could anyone pls let me know what is the optimum aspect ratio for 180nm. Is there just one specific width and length value or is der a range between which we can choose these values.. Thank you so much!!!

 

[Prashanthanilm]

On the Standard Cell :
No we don't have a particular transistor width for pMOS ans nMOS.
We can vary depending on the requirement.