C based verification environment

[hardy]

I have a need to update a legacy verilog verification environment. The ASIC is entirely in verilog, but will be integrating a processor and this will require the inclusion of a C/C++ interface. There are a number of tools in use and I am in the early stages of evaluating what approach to take.

Any insight?

 

[rjainv]

If you intend to still use verilog only as verif environment, you can use PLI to add C/C++ interface.

 

[hardy]

Thanks rjainv.

I find the PLI interface very cumbersome and inefficient - I've started researching some of the more recent tools and hope to find something easier to integrate.

We will need to prepare processor code in C, compile and simulate the execution to verify the function.

 

[mssajwan]

Use cadence ncshell to genarate the interface files.
Manmohan

 

[archillios]

hey, think about the seamless CVE co-verification tool of Mentor graphics, it's mature, good candidate for you.