Built in Self Test of FPGA

[renuprasad]

Hi... I m doing a project of Built in Self test of fpga, my part is to test a single clb for all faults using modular partial reconfiguration.. Can anybody help me regarding this....

 

[aethor]

It depends on which FPGA you're going to use. I imagine you're using a Xilinx one ("a single CLB"). If that's you're case i would suggest you to use EDK's HWICAP peripheral (if compatible). Take a look into the SW drivers and you'll find something to read from a single CLB.

Hope it helps you