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Buffering a 20MHz clock

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djnik1362

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hi
I have a board that use a 20 MHz TTL oscillator .
I must send this clock out to some other boards too.
I need help to use proper hardware.

My idea was to connect oscillator output to bunch of inputs of 74hct245 buffer
(for more current) and then connect outputs of connected inputs to produce buffered clock.
I already use this idea but it didn't works.
Buffer outputs (Connected Outputs) amplitude is between 2.5 to 4 V and
there is a distortion in wave. Oscillator output voltage is between 2 to 5V.

i use a 50 ohm series resistor for clock input of FPGA but connect oscillator's
output directly to buffer inputs without any series resistor.

May be there is a discontinuity in impedance or 74hct245 isn't proper for that.
Can you help me for this situation.

Thanks for your support.
 

Some questions :

1 ) What distance those boards are from that ?
2 ) What kind of cabling was used ?
3 ) That conducted signal was shielded ?

Please draw and post here where was placed the buffer ( close to IC ? close to connector ? )

+++
 

1.

How the boards share a ground is a typical problem in this situation.

Advice says you should connect the circuits as close as you can to a single ground point.

2.

There's a limit to how many devices you can fan out to. (Depending on the source device and the receiving devices.)

Did you try connecting one at a time to see when the original waveform gets distorted?
 

Some questions :

1 ) What distance those boards are from that ?
2 ) What kind of cabling was used ?
3 ) That conducted signal was shielded ?

Please draw and post here where was placed the buffer ( close to IC ? close to connector ? )

+++

Thanks for your response.
1) it may be 1 meter Maximum. I probe signal at buffer outputs when there is no connection between boards.
2, 3) it connect through Back plane.

---------- Post added at 16:49 ---------- Previous post was at 16:48 ----------

1.

How the boards share a ground is a typical problem in this situation.

Advice says you should connect the circuits as close as you can to a single ground point.

2.

There's a limit to how many devices you can fan out to. (Depending on the source device and the receiving devices.)

Did you try connecting one at a time to see when the original waveform gets distorted?

1) There is one ground for all boards.
2) No. I must try your idea.

Thanks for your help.
I hope other guys find a good way to overcome this problem.
 

Hi

Distance of 1m is considerably far to distribute signals of that band magnitude at standard cablings.
However it´s possible to take a RF aproach to accomplish that transmission.

You could use an connector at board (BNC) despite it be very expensive.
For while I canno´t think in other cheaper option but surelly exists.

+++
 

Hi

Distance of 1m is considerably far to distribute signals of that band magnitude at standard cablings.
However it´s possible to take a RF aproach to accomplish that transmission.

You could use an connector at board (BNC) despite it be very expensive.
For while I canno´t think in other cheaper option but surelly exists.

+++

20 MHz doesn't need RF approach .
The problem is needing to send 20 MHz clock that have 2V-4V Voltage Level to
another board for synchronization. I must buffer this clock properly but i don't know how.

I find an IC and it seems can be used.
SN65LVDS32A
How about this ?


Is there any idea ?
Thanks.
 
Last edited:

Haven't much experience with this kind of setup...

If your clock alternates between 2 and 4V then that's a narrow region to discriminate between low and hi.

Stray capacitance in long cables can turn square pulses into triangle waves.

Therefore consider using schmitt triggers to obtain vertical pulses once again.
 

20 MHz doesn't need RF approach...

Some Scopemetters have exacly that 20MHz frequency specified in the Bandwidth.
And it probe cable is Coaxial type.

I may be wrong but due to some EM effects simple cablings could affect signal integrity rather than a self-shielded one.

+++
 
I think it would be best to use individual driver devices to supply each cable. The lower the impedance the better. High impedances are susceptible to stray capacitance.

Also to make the cable pulses swing between zero and 5v. You can re-condition pulses to 2v-4v swing where it enters each board.

One meter cable distance. Lightspeed at 1 ft. per nanoSec. This means the 20 Mhz clock pulses may get slightly out of sync by a fraction of a cycle. Does this affect operation?
 
I think it would be best to use individual driver devices to supply each cable. The lower the impedance the better. High impedances are susceptible to stray capacitance.

Also to make the cable pulses swing between zero and 5v. You can re-condition pulses to 2v-4v swing where it enters each board.

One meter cable distance. Lightspeed at 1 ft. per nanoSec. This means the 20 Mhz clock pulses may get slightly out of sync by a fraction of a cycle. Does this affect operation?

You right but how i implement your idea.
Can you offer me some Parts or any reference ?

How about re-condition clock to proper voltage level ?

Thanks.

---------- Post added at 04:51 ---------- Previous post was at 04:50 ----------

Some Scopemetters have exacly that 20MHz frequency specified in the Bandwidth.
And it probe cable is Coaxial type.

I may be wrong but due to some EM effects simple cablings could affect signal integrity rather than a self-shielded one.

+++

Yes. It's true. I am not a experienced guy in RF field.
Thanks.
 

To send pulses to cable:

You can probably use any convenient gate as the output device to each cable. Its job is simply as a buffer.

Maybe a TTL IC with four AND gates, OR gates, NAND gates, inverters, etc. 7400 family.

Or quad nand Schmitt trigger 74LS132. Output goes hi when input rises above 1.7V. Goes lo when input falls below 0.9 V.

The inputs must go above and below certain V levels to distinguish hi and lo. Since your clock ranges 2 to 4 V it must be conditioned. A simple resistor divider may bring it in range for input to the Schmitt trigger.

=============================

I add a list of TTL operating requirements:

Use .01 to 0.1 uF decoupling cap for every 5-10 gate packages. Connect as close to the IC as possible. This neutralizes spikes that occur at supply pins when a TTL device changes state.

One TTL output will drive 10 TTL inputs, or 20 LS inputs.

One LS output will drive 5 TTL inputs, or 10 LS inputs.

Tie any unused inputs to V+ or gnd. Or to a used input on the same chip.

Avoid long wire runs.

=========================
 

Hi
This is a circuit i found in a schematic and i want to use
it in my design . But before using this circuit i need to analyze it.

20mhz.JPG


First of all is 74HCT245 proper for this clock (20 MHz) ?
If it is so how about connecting more than one pin of this buffer ?
Is this work ? Is there any protection resistor in buffer output or not ?

I need to transfer buffered clock to connector.
What PCB layout consideration must be met ?

Thanks for your support.
 

Place that buffer so close to output connector as possible.
Also is desirable to shield that clock signal routing GND planes near to it.

+++
 
R37 and R38 connected to the buffer output don't seem to serve a reasonable purpose. They are mainly dissipating power. But you most likely would want a series termination for both clock outputs. Considering the buffer impedance, you'll come near to 50 ohm with a 43 to 47 ohm resistor. This would be at least the suggested driver impedance for a 50 ohm coax cable. A PCB trace may have a slightly higher characteristic impedance. I reviewed the thread, but didn't find substantial information about the properties of the connected "load", e.g. logic standard, input capacitance, only a 2-4V voltage level was mentioned.
 
R37 and R38 connected to the buffer output don't seem to serve a reasonable purpose. They are mainly dissipating power. But you most likely would want a series termination for both clock outputs. Considering the buffer impedance, you'll come near to 50 ohm with a 43 to 47 ohm resistor. This would be at least the suggested driver impedance for a 50 ohm coax cable. A PCB trace may have a slightly higher characteristic impedance. I reviewed the thread, but didn't find substantial information about the properties of the connected "load", e.g. logic standard, input capacitance, only a 2-4V voltage level was mentioned.

The load is some logic device . This clock use to sync other boards with this board.
My problem is when i using this circuit there is a distorted clock with 0-2 V level in buffer outputs.
Is this due to connecting more than one outputs ?
Is there any protective resistor for connected outputs ?

Thanks for your support.
 

Each stub, either coax cable or PCB trace of some length should have an individual series termination.
 

Looking back at the OP...

You state you're using TTL. The output of TTL devices alternates between 0V and 5V (ideally).

Yet your clock signal ranges between 2.5 and 4 V. All of it in the region of TTL hi.

But does it ever go below 0.8 V which is the region of TTL low?

If I were to see TTL circuitry showing levels in the middle region, I would start looking for a supply pin with a bad connection.

So I assume you have other circuity in the project which requires your specified 2-4V clock signal. I imagine however that you have a pulse conditioner somewhere to or from the TTL circuitry, to allow an interface between the incompatible signal levels?

Are you generating the initial clock signal using a TTL device? Can you tap into that? I think you want to send the initial clock pulses rather than pulses that have gone through propagation delays.

You're sending the pulses to distant boards. I don't know for sure, but it's possible for reflection signals to come back through one cable from one board, and then go to the other boards. Your clock pulses can get noisy. This is why I think you should use multiple sending devices, one for each distant board.
 

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