buck converter...vref for PWM converter....

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bharatsmile2007

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Hi all,

In buck converter PWM control.The output is fedback to error amplifier,whose other input is Vref.Generally Vref is taken as 1.2V.

Can anyone tell me how to choose the Vref..?

Thanks
 

it's depend on your feedback loop gain. let say if the feedback loop gain is 5, and your Vref is 1.2, then the output should regulated at 5x1.2=6v
 

thanks..

if you have any document for designing buck converter..pls upload...
Thanks again...
 

The input referance voltage is no need to be 1.2V, it can be of 2,205,3V ect. The value we set depends on the feed back gain.
If you look into the internal structure of the PWM controller IC's, they show you an Internal OP-amp with inverting and non-inverting pins. Normally refernce voltage we set at non-inverting pin. The output voltage is fedback to PWM controller inverting pin with some gain( can provide isolated feedback using optocouplers if necessary). Simple logic of PWM control is, when output feedback voltage at inverting pin tries to go more than set refernce voltge, the op-amp output will start reduce and maintain mean value because PWM signal is pulsed.
As this voltage tries to increase more the off-time will increase, i.e dutycycle will reduce to maintain the ouput voltage.
We need to set the referace voltage, feedback gain such that inverting and non-inverting pin voltage should be at same level(magnitude) at the desired voltage level. If you adjust the either of inverting or non-inverting pins the desired ouput voltage level changes.
I hope this is helpfull to you
 

Choosing VREF may be driven by your desired output voltage.
To get an output voltage lower than VREF requires additional
components (gain amplifier) which adds error and lag. Older
PWMs used zener references which are no good below about
5V. Later came bandgaps and now you see divided-bandgap
references to support <1V logic, often 0.6V.

Of course too low a VREF adds its own error issues, and noise
sensitivity.
 

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