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Buck Converter Circuit PSS/PSTB simulation for gain/phase margin check

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vleam13

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Anyone can help me check my simulation idea correct or not? thanks. 5282_Figure%202 - Copy.jpg
 

Hi,

I hope this is a sketch only. There are some issues.

It looks like you connected the feedback path on the Gnd connection of the scope...
The compensation of the feedback OPAMP is dubious, it seems to be made for low gain setting, but your Opamp has no (local) feedback.
Is it correct that the feedback opamp is inverting?
I don't know how the current sense works. What is the current to voltage ratio?

The Mosfets may need diodes..

It seems that this is a simulation model, but I doubt this could work. For me it seems to be too far away from reality. Or is there hidden information?

Klaus
 

Hi,

I hope this is a sketch only. There are some issues.

It looks like you connected the feedback path on the Gnd connection of the scope...
The compensation of the feedback OPAMP is dubious, it seems to be made for low gain setting, but your Opamp has no (local) feedback.
Is it correct that the feedback opamp is inverting?
I don't know how the current sense works. What is the current to voltage ratio?

The Mosfets may need diodes..

It seems that this is a simulation model, but I doubt this could work. For me it seems to be too far away from reality. Or is there hidden information?

Klaus

Hi Klaus,

Thanks.

Ya. It us just a sketch. I googled for DCDC current mode buck converter images.

My actual circuit is working. Transient analysis completed and simulation results OK.

Now I am concerning on phase margin so I would like to check it with spectreRF PSS/PSTB analysis.

Currently I am running the simulation but looks like it will takes very long time. I am not sure whether my ADE setting and iprobe component placement correct or not.

Thanks.

regards.

- - - Updated - - -

ya. that is not a scope. Is component for simulation called "iprobe"

I will be shorted for transient/DC simulation and open for AC analysis.
 

If you want better advice as to how to simulate the phase margin then you need to show us the actual circuit.

In general, to simulate the phase margin of a switching regulator you need to linearize the PWM portion of the circuit into its analog equivalent.
To do that you calculate the gain of the PWM circuit (change in average PWM output voltage, as determined by the duty-cycle, into the inductor divided by the error voltage into the PWM comparator).
You then put that gain as a gain-block in the control loop in place of the PWM switching circuit.
That allows you to analyze the feedback loop as an analog circuit.
 

If you want better advice as to how to simulate the phase margin then you need to show us the actual circuit.

In general, to simulate the phase margin of a switching regulator you need to linearize the PWM portion of the circuit into its analog equivalent.
To do that you calculate the gain of the PWM circuit (change in average PWM output voltage, as determined by the duty-cycle, into the inductor divided by the error voltage into the PWM comparator).
You then put that gain as a gain-block in the control loop in place of the PWM switching circuit.
That allows you to analyze the feedback loop as an analog circuit.

Thanks. Currently I am looking for help from Cadence forum since it is simulation tool issue.
https://community.cadence.com/cadence_technology_forums/f/38/p/34404/1343555#1343555
 

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