Hello, what do you want?
1.) An explanation why the circuit oscillates at all?
2.) An explanation (calculation) for the frequency of oscillation?
The answer to 1.) is simple: There is no reason that the circuit prevents from oscillating. If there is a frequency that fulfills the oscillation criterion (loop gain phase zero deg, loop gain magnitude larger than unity) the circuit will be able to self-excitement. However, because of the large inverter gain this opamp is heavily saturated (strong limitation) resulting in a squarewave. After some filtering due to the following RC lowpass stages you can obeserve near-sinusoidal waveforms.
To answer the 2nd question one must take into account two effects: (a) The last RC stage now is loaded (470k could be neglected, 26.7k must not ) resulting in a more complicated formula, and (b) storage effects due to strong saturation of the opamp may have an influence of the oscillation frequency.
Does this answer some of your questions?
However, there is something I do not understand: I think, the output at C5 should be worse. Therefore, did you perhaps mix the designations of C2 and C5?