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Bridgeless totem pole power factor correction is not common...why?

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treez

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Hello
The boss has asked me to evaluate a Bridgeless Totem Pole PFC (BTP-PFC) stage for our 1kW Offline Battery chargers.
However, recently I had to reverse engineer loads of Offtheshelf offline battery chargers to 3Kw , and none contained a BTP-PFC.
I am convinced there’s something of a trick question going on here, …its like the PFC’d resonant CUK converter that was supposed to do Vout regulation and PFC in a single stage, but it never took off.
What is the snag with the BTP-PFC?
For a start there’s the expensive GAN FETs that are needed. But what’s the gotcha?
(This by the way, wasn’t one of the questions asked to me about it, so I am not cheating.)
 

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The hidden issue is the CM noise that a simple version produces... otherwise they can be made very effective ...

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also inrush current capability of the fets
 
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Thanks yes, i hear that if the BTP-PFC is implemented with a leg of GAN FETs , and a leg of normal fets , that the common mode noise issue is no worse than in a standard boost PFC stage?
 

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Um, not really, if you draw the ckt and work out which nodes are jumping up and down at HF w.r.t. neutral and or the output 0v line - you will see the problem.

In a conv PFC, either the phase or the neutral is clamped to the 0v line and there is only a little 100Hz CM edges going on

there are many papers out there focusing on overcoming this issue

We built a simple laptop adapter ( 12V 18A ) for Samsung in 2003, using a simple 4 fet PFC, it worked great but there was a lot of CM across the main Tx and optocouplers...
 
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This Gan systems reference design note reviews a couple bridgeless topologies and compares them.

https://gansystems.com/wp-content/uploads/2018/01/GS665BTP-REF-rev170905.pdf

I’m quite interested in this topic in general and have read over the reference designs from GAN systems and Transphorm.

Edit: I’ll take some of that back and come back later after I’ve looked at it more.
 
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That design note above would appear to be quite useful, but note, 2 stages of EMC filtering on the pcb - and not a single reference to EMC in the text and not a plot of EMC performance - have a guess why ...?!?!
 

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Note that transphorm is also pushing this hard as well:
Paper: https://www.transphormusa.com/sites/default/files/transphorm/news/Totem-pole paper_0.pdf
Reference design: https://www.transphormusa.com/en/reference-design/tdttp3300-rd/
2.5kW Eval: https://www.transphormusa.com/en/evaluation-kit/tdttp2500p100-kit/
4kW Eval: https://www.transphormusa.com/en/evaluation-kit/tdttp4000w066b-kit/

The last two are available on digikey so buying and evaluating would answer all questions (the GAN systems one is for sale too).


So this topology does have a common mode 'problem' when it switches the low speed leg. That flips neutral from PFC_POS to PFC_NEG instantly forcing the entire PFC bus to make a common mode leap.
 

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and again - no reference to the noise made by the prototypes ....!?!?!?

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and 66 kHz switching, just using GaN for the lower Ron ...
 

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treez

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also inrush current capability of the fets
Thanks, i believe that we can add diodes to bypass the FETs for the sake of inrush.....but yes i see your point, thats even more components.
 

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treez

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Hello,
I did a rudimentary simulation of both a Boost PFC stage and the Bridgeless Totem Pole PFC as attached (in the free LTspice).
I can see that with the BTP-PFC there are switching nodes which are “more closely connected” to Phase or Neutral than in the conventional Boost PFC stage. As such, there would need to be the extra Common mode filtering stages in order to mitigate this.
The conventional diode bridge does kind of have switching nodes, but the dv/dt is much softer than in typical SMPS, so less of a noise problem.
Yes and its interesting how not one of the Application Notes actually mentions this extra EMC problem.
Having said that, they’d probably say that adding an extra common mode filter is a small price to pay for the efficiency increase.

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Bridgeless Totem pole PFC…
https://www.youtube.com/watch?v=Jv2JVorAeiE&feature=youtu.be
Thanks, the above youtube video on BTP-PFC certainly mentions a number of problems with the BTP-PFC. Interestingly, at 10:00 onwards, they state that overall diode losses for a conventional Boost PFC amount to around 1.3% at 240VAC. So for a 3kW supply , you are saving around 40W with a BTP-PFC…..so that’s certainly welcome to take that dissipation away from inside the enclosure.
if you draw the ckt and work out which nodes are jumping up and down at HF w.r.t. neutral and or the output 0v line - you will see the problem.
….Interestingly, the above video does not mention this particular EMI problem. The video does however, mention the EMI problem mentioned by asdf44…..
So this topology does have a common mode 'problem' when it switches the low speed leg. That flips neutral from PFC_POS to PFC_NEG instantly forcing the entire PFC bus to make a common mode leap.
….at 34:16 of the video, it mentions this problem, and says that it can be mitigated by implementing a special soft-start in the slow FETs every time the supply crosses through zero.
The video goes on to talk about reducing switching losses in the BTP-PFC by operating it in Boundary conduction mode and using ZVS…..the problem is, this reduces turn-on switching losses, but increases turn-off switching losses…so its not all good.
Also, the video states that the BTP-PFC offers no size reduction compared to conventional Boost PFC.
There are also the more obvious problems with sensing of current and line voltage. Along with the high side drives etc. The high-side slow FET obviously need an isolated high side supply for the driving of its gate.
 

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and again - no reference to the noise made by the prototypes ....!?!?!?

- - - Updated - - -

and 66 kHz switching, just using GaN for the lower Ron ...

No reverse recovery and faster switching with lower crossover losses in general.

Why is inrush a special problem here? It's a onetime event, don't see why gans ability to handle it is in question. I'd also expect standard inrush limiting strategy. Gan systems board has standard NTC+Relay (though as an aside with the relay present a PTC is the right choice in my opinion).


Treez that video is very good. What does 'soft start' mean. You can't pwm that node because there is no inductor there. Have a large dead time and let it soft switch? Maybe.

As to the size comment I don't really buy it. Efficiency and size go hand in hand. Lower dissipation means smaller fets with smaller heatsinks.

As another total aside the video goes into CRM ZVS which has never made sense to me. Letting inductor ripple be so huge that it crosses zero every cycle obviously allows soft switching: this works in any half bridge topology (buck/boost). However it causes variable frequency, it requires peaks that are 2x the average and thus greatly increases RMS current (through the whole power stage) and forces you to specify an inductor with double the saturation current (4x the size/energy). All really costly tradeoffs.
 
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Treez that video is very good. What does 'soft start' mean. You can't pwm that node because there is no inductor there. Have a large dead time and let it soft switch? Maybe.

Good point....i dont see how you can easily soft-start the slow fets....unless you transition them slowly through the linear region till on fully....but that'd be more components etc
 

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treez

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I spoke to a consultancy who want to design a BTP-PFC . They said they wish to have the controller ground at the live line just downstream of the EMC filter.(as in the attached schem and LTspice sim)
This is based on the fact that they have the current sense resistor there, and so they will be able to directly read it with a diff amp there. This, they believe , will facilitate having an all analog controller.
But I believe that this place is going to be a noisy place to have the controller ground, do you agree?
 

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With isolated gate drivers I assume?

That place has the previously mentioned common mode variation between it and the PFC bus. But either you reference the control to AC and have that common mode 'issue' looking at the PFC bus, or you reference control to the PFC Bus and have common mode issues looking at the AC. Of course I imagine these are differential stages, but still they will suffer from that large common mode step to some extent.

My first thought which I believe all the demo boards use is a hall effect looking at current which is easy to use with control referenced to PFC GND. The advantage I see here is that control and gate drive can share one aux supply.

Hall effect Transphorm uses on reference design:
https://www.digikey.com/product-detail/en/akm-semiconductor-inc/CQ2234/974-1103-5-ND/5419611

On the other hand on real quick thought if you decided you had to use a shunt I can't think of a better way to do it (you certainly can't easily 'look' at a shunt bidirectionally over a +/-400V common mode swing). But I think the hall effect is the way to go (that said its bandwidth constraints perhaps prevent certain control schemes)
 

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I can't see any way in which that will work well, a fully isolated current sense works best... really a suitable ground point should be chosen and then all signals level shifted and or isolated to that point, small CM chokes on inputs are useful ...
 
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I can't see any way in which that will work well
Thanks, i tend to agree, i just think the noise issues will end up being far worse with control ground being taken as the live line just downstream of the mains input EMC filter. I am amazed that a consultancy would be advocating doing it like this.

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I am wondering why not one single Application Note on the entire internet actually mentions the very bad EMC problem of the BTP-PFC?……why this “cover-up” over the BTP-PFC?

The BTP-PFC brings with it a very bad common mode EMC problem due to the fact that the controller will inevitably be referenced to the DC Bus negative net. This net is by its nature, a very extensive net, going widely over the PCB (since it’s the reference point for much of the BTP-PFC circuitry) …the problem is, that in BTP-PFC, this net has a very high dv/dt with respect to earth ground….and this is the absolute recipe for bad common mode EMC issues. The attached (red) waveform shows the BTP-PFC problem (LTspice sim also attached)

With conventional Boost PFC, If you probe the Neutral input with respect to “DC Bus ground”, then the dv/dt with respect to the DC Bus ground isn’t so high. (as the green waveform shows)


So this topology does have a common mode 'problem' when it switches the low speed leg. That flips neutral from PFC_POS to PFC_NEG instantly forcing the entire PFC bus to make a common mode leap.
Thanks, I see what you mean by this now…after running the simulation, which compares Conventional Boost PFC with BTP-PFC, I can see the problem.
With conventional Boost PFC, If you probe the Neutral input with respect to “DC Bus ground”, then the dv/dt with respect to the DC Bus ground isn’t so high.
However, with the BTP-PFC, the dv/dt between DC Bus ground and the Neutral is very high….and this means terrible common mode EMC problems. This situation is shown in the attached waveform diagram, which shows voltage between Neutral input and DC Bus ground for a BTP-PFC. (Red waveform)
And the key point is that DC Bus ground, is , by its very nature, a very extensive net, probably running over a great area of the PCB…so what we have , is this wide area of PCB copper which has a very high dv/dt with respect to Earth ground (since neutral is ultimately connected to earth ground). –This is the absolute perfect recipe for disastrous common mode EMC issues…the high dv/dt of a wide area of pcb copper with respect to earth ground.
The LTspice simulation attached actually shows the problem. I have never seen a real product in the market which actually uses BTP-PFC……and certainly on the entire internet you cannot find a single application note giving a conducted EMC scan of a BTP-PFC design.
I am beginning to wonder if this BTP-PFC is going to end up getting consigned to the scrap-heap, due to the impractically extensive EMC solutions that are needed to accommodate it?
 

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Though note that the switching you see on the red trace is the result of your simulation using diodes instead of fets for the slow speed switch. Fets of course would limit that to a single transition.

It’s a large common mode step but the fact that it’s 60hz would greatly reduce its energy I would think.

I assume that the layout/design strategy for this topology might change so you’d minimize the size of the PFC bus shapes. (Maybe that’s even part of the argument for placing control on the AC).

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Though to be clear I think this common mode problem is an issue. We have one system where PFC is widely distributed and I shudder at the thought of sending that common mode shock across the system. The issue would go in both directions too. Backwards out the line and forward through the final output isolation barriers.

On the other hand in other systems the PFC bus is a fairly small intermediary point between input and output. I could believe this topology works ok in that scenario. As you know, high power converters need fairly large shapes for their actual switch nodes and survive EMI. Transphorm touts one product shipping with this PFC (though advertised as 'the only' totem pole power supply on the market, heh):
https://belfuse.com/product/part-details?partn=TET3000-12-069RA

Treez here is my quick take based on your simulation. I added fets and changed around the control to Hysteretic. I'm not convinced that's the way to go but it definitely has some pros. For example the zero crossing demands the duty cycle of the high speed leg changes instantly - hysteretic has no problem with that. Hysteretic would also be a good candidate for all analog control.

Note that earlier we brought up 'soft starting'. I now believe they're referring to this pwm transition on the high speed leg, not the low speed leg.


View attachment btp_pfc_asdf.txt
 
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(Maybe that’s even part of the argument for placing control on the AC

Thanks asdf44...your sim is absolutely brillant also..thanyou for that.

If you had the choice would you put the ground on the live or the neutral?....(assuming the decision has been taken to put gnd on the AC)

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Hello,
The attached is a BTP-PFC with pure analog control. I cannot see any reason why this would not work…can you?
Why are there no Pure Analog control solutions on the internet anywhere for BTP-PFC?
 

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Between L and N I'd choose N since its more likely to be earth referenced but you can't rely on that in any way.

A few comments:
The Voltage->PWM-->Isolator is a nice simple trick for isolating but you don't need isolation here. I'd specify a differential amplifier with some other means of rectifying that if needed. Especially when you consider you need to power the LTC6992

The biggest issue is the step in the duty cycle that needs to happen at the zero crossing. It needs to go from 99% to 1% in one cycle ideally. Your sim showed a pretty large step which I believe would get worse if the diodes are changed out to fetc. Besides a peak/hysteretic current control scheme I think you'd want something to mitigate it.

I'd consider either a feed-forward which takes a polarity signal and couples it into the output of the current amplifier to cause the necessary step (with a time constant of something like 1-10hz of decay). Or I'd have a mux somewhere which changes how the duty cycle is generated from the output of the current amp at the zero crossing to 'invert' the resulting duty cycle.

As for the common mode noise I see a potential advantage by putting a 'large' (1u maybe) cap across the diodes (d6/d5 in your latest diagram). This is the best approximation of a soft start and completely knocks out that high frequency common mode noise. I've never seen this in literature but I can't think of a reason not to do it (yet).


If I was doing this I'd take the same general approach, block diagram it out, but then see how much functionality could be pushed back into an existing controller IC. For example most of what you have is in a standard PFC controller, (current eamp, voltage eamp, and multiplier).

Also Treez, you love simulation - I think you need PSIM. It's better than LTSpice for planning out these topology and basic control choices (has drop in blocks for PWM generation, PI/TypeII/TypeIII compensator, single pole filters etc etc).

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Here is another app note which does a nice job highlighting all the control challenges. A few others are brought up here.
https://www.ti.com/lit/an/slyt718/slyt718.pdf

Treez do you have any digital expertise over there? You could have a microcontroller or FPGA in a monitoring role (as opposed to real-time feedback) and the requirements would be pretty relaxed. But it would be easy to knock off some of these corner case issues like "Vac Drop" with digital monitoring. Microchip micros (and maybe others) have configurable logic gates which would allow gate drives to pass through the micro, and therefore be controllable, without adding clocked delay and the resulting reduction in timing resolution.
 
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