BRAM model question?

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Zerox100

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Dear all

I have two model of BRAM in verilog. I dont know which of them is more accurate?
Could you please check the attached code and tell me which is better?
I have attached both of codes in "bram.txt"
 

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  • BRAM.txt
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you should look at the synthesis guide. I'm guessing vivado won't like the second version. I'm not sure if it will like either actually.

also, the interface is weird. you set the address, we, and sel0 to do a write. you set the address then set sel0 on the next cycle to do a read. you always do the reads for both channels. the output toggles to 0 when sel is low, but it seems like this isn't needed at all as the driving module will know if it has set sel.
 

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