Boundary-scan/Slave serial configuration mode

[cowslip]

slave serial mode

Hi everyone,
I wonder what is the difference in result when using boundary-scan or slave serial configuration mode in programming a Xillinx FPGA.

Does anyone knows what "daisy-chain configurations" mean in slave serial mode?

I realize that in boundary-scan configuration mode, the TCK(test clock) is used, while in slave-serial mode cclk is used.

Thanks in advance. :roll:

 

[echo47]

slave serial mode of programming

Both methods will configure the device. You choose the method that's most convenient for you. The JTAG boundry-scan method is popular because it's an industry standard.

Daisy-chain slave serial means you have two or more FPGAs with their configuration pins chained together. You send one long bitstream into the first device, and all the devices get configured. That's conveneint.

You can read more about these options in the "Configuration" chapter of your FPGA documentation. Unfortunately, Xilinx puts this chapter in different books depending on which FPGA you have.