Bootstrapping current for bandgap generation

[diarmuid]

Hello,

I am designing a bandgap and need to create the bias for the opamp used in it. I am using the bootstrap circuit from Allen & Holbergs "CMOS Analog Circuit Design" (Pg. 149), attached.

The question I have is this circuit, as with most good such bootstrapping circuits provides a current independant on supply.

However, won't the current be massively dependant on process variation (current is defined at node A in schematic)? Wont that variation be so large as to swamp any supply variation?

Thanks,

Diarmuid

 

[dick_freebird]

This is your fundamental "box" for designing startup circuits.
The startup current needs to be large enough to boot the
loop in the worst case, and it needs to be low enough to
not bother the loop setpoint in the "best" case. PVT can
make this a thread-the-needle exercise especially if you
want to stay simple (like diode-steered resistor pullup).

My standard approach has come around to more switched
type topologies, where the boot current is shunted or
blocked by a switch that is controlled by sensing the
bandgap voltage for rough sanity. Now you only depend
on there being enough loop gain about that point, to
keep it locked when the stimulus is taken away, and
have negligible boot current influence over the loop once
it has "caught".

Costs are of course complexity, and some sensitivity to
the accuracy of whatever output-level-checking circuit
you may come up with (could be simply a high-VT NMOS
switch and passive load, if your loop has become linear
with decent gain at your PVT-minimum VTN - but, is it?).

 

[diarmuid]

Thanks dick_freebird. Could you send me on a reference / schematic of the switched type topoloy you mention.

Also - what about the bias current generated. Will that not vary massively across process even if it is supply independant?

Thanks,

 

[arya.jagadeesh]

This is your fundamental "box" for designing startup circuits.
The startup current needs to be large enough to boot the
loop in the worst case, and it needs to be low enough to
not bother the loop setpoint in the "best" case. PVT can
make this a thread-the-needle exercise especially if you
want to stay simple (like diode-steered resistor pullup).

My standard approach has come around to more switched
type topologies, where the boot current is shunted or
blocked by a switch that is controlled by sensing the
bandgap voltage for rough sanity. Now you only depend
on there being enough loop gain about that point, to
keep it locked when the stimulus is taken away, and
have negligible boot current influence over the loop once
it has "caught".

Costs are of course complexity, and some sensitivity to
the accuracy of whatever output-level-checking circuit
you may come up with (could be simply a high-VT NMOS
switch and passive load, if your loop has become linear
with decent gain at your PVT-minimum VTN - but, is it?).

who decides the amount of startup current

 

[dick_freebird]

Yes, the variation in boot current is a problem to be solved.
Especially fun when you are looking at MIL temp (or wider)
designs and sloppy tolerances on your choice of always-on
element. But you need to get certainty.

Startup current must be greater than the holding current
of your bandgap loop, which will let it snap in to setpoint.
You will always have a "pull-in range". You will likely find
this depends on things that modeling people dismiss in their
priorities - leakage modeling in detail, variation of leakage,
low current hFE in bipolars, low current nonidealities in
reference diodes / transdiodes. All of the little losses that
make natural leakage from the P devices inadequate to
light off the N devices reliably.

You need to know that point across the envelope, and
you need to know the other point where current from the
startup circuit will affect setpoint / tempco. This is where
you would like something sharper than diode steering (the
original startup scheme in bipolar bandgaps).