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Boost PFC with Current sense transformer?

24vtingle

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Hi,
The attached LTspice and .PNG is a Boost PFC with a single current sense transformer.
Why does the datasheet of the LT1248 (and all other similar chips of which there are many)
not recommend this approach?
After all, the attached has no ground splitting current sense resistor, and so it is much easier
to parallel with other similar Boost PFCs.

Why does the datasheet not mention this connection?
None of the application notes even mention it.
Also, the UCC3818 and co are all this same kind of chip, and their datasheets and App notes make
no mention of this fortuitous connection either.

Do you know why this is?

Its like having a Ferrari to sell but advertising it like its just an old pushbike....competeley down-marketing it.

LT1248:

UCC3818:
 

Attachments

  • Boost PFC with single current sense transformer.png
    Boost PFC with single current sense transformer.png
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  • PFC with single Current sense transformer.zip
    PFC with single Current sense transformer.zip
    3.7 KB · Views: 18
Last edited:
actually using one or two CT's in a booster was covered by unitrode about the same time they brought out the UC3854 chip. ( SLUA_172 )

Using one CT in the drain plus a clever current mirror ckt to re-create the ave current in the choke - allowed 5kW boosters to be made way back in the 90's . . .

: o) EP.
 
Last edited:
Thanks, the above is fortuitous, since it needs no "duty cycle limiting circuitry"...whereas when two current sense transformers are used, the DC limit cctry is needed.
Also, the SLUA172 doc gives a method for single transformer current sense, but it appears more complicated than it needs to be...the top post shows a simpler way of doing it.
(SLUA172 applies to UC3854, but UC3854 is a cousin of LT1248 as all know.)

SLUA172

UC3854
 
Last edited:
Any time you put a CT in the drain of a mosfet that cannot go to 100% D, e.g. a booster,

you will have to limit the D to say 96% max, to allow for reset of the CT, else you have a kerfuffle . . .
 
Thanks, thats why it surprises me that the option shown in the top post is not demo'd in the app notes...because for this one, the FET current is depicted by a sense resistor, so no D limitation needed.
Why is there no App Note depicting this superior, yet so simple, circuit?
 

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