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Blocking EDA-SW Patents by collecting EDA-Concept Ideas

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Advanced Member level 3
Feb 25, 2002
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I have found that some EDA-SW patents are based on simple conceptional ideas resulting from obvious applications solutions!

One example is the patent of Cadence's spectre to modify the netlist semantic of spice so that a subcircuit could be instanciated as a model.


In the Cadence world it is called "inline subcircuit". I have seen such an approach by some netlist preprocessing tools. So it seems to me that Cadence have used an already, by some user, known netlist processing "trick" to formulate a patent claim.

From the user perspective is a useful feature. The problem is that this kind of claims block useful SW development and deployment. If you write for example netlist processing scripts and is very likely that you violate patent claims by simple doing work. At some point the effort to research legal problems and workaround exceed the original SW effort by factors. Or a specific tool property is exactly blocked by a combination of trivial SW patents from different vendors, not nessescary the competition.

The practical problem is verify that a claim, which is sometimes known to an expert not to be unique and new, has prior art. There is no public information avaible about most of the SW development work done today. Only some university or open source allows to counterdemonstrate the prior art. You have to sometimes reengineer a source code to show that the method claimed was already used 10 years ago. That code is used a company which brought that from another and so on.

The simple idea is if there is public informations about user knowledge a simple conceptional idea about EDA could not be taken as a patent claim. I am shure that the above example did exist before 1999-01-22 but no one thought it could be claimed. The problem is that if the claim is not checked for prior art before granding the patent the knowledge about prior art is vanishing faster than the lifetime of the patent.

I could block for example a patent which is related to circuit simulation. I propose a method that the device instance power is stored iny ascii or binary file and also the summed up power for a subcircuit which contain the instances. The user innovation is that now independend from the hierachical viewpoint the circuit simulator could report the drawn power.

The next example is that the netlist also contain the flat or hierachical poistion within a layout of an device. So with the power information a 2.5D thermal simulator could use the netlist and the circuit simulation power to simulate the local circuit temperature distribution.

The key idea is to publish advanced user requirements about EDA before a vendor says thats my idea. "Because thats my idea I claim the idea and also the implementation". That help also to focus a number of vendors on the user requirements and block to claim a common solution principle.

My question is there more informations about such public processes to improve the prior art search? Is there a page which formulate most user requested features?

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