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BLock Ram's value....

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sohiltri

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Can anyone tell me whether is there any provision to know the values stored in block ram at every small instant of time thru serioal or parallel port without outputtin the values during testin input after synthesis in FPGA....
 

echo47

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Your question is very unclear. What are you trying to do? What type of FPGA are your talking about?

With some Xilinx FPGAs, you can use "readback capture" to examine the state of internal registers and memories.
 

sohiltri

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i am using virtex 4 board.... i have one complete matrix o/p stored in block ram...i want to read at certain interval of time to verify the answer.... how can "readback capture " can be performed ???? wat tool is required...
 

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A low-level description of the readback capture feature is described in chapter "Readback and Configuration Verification" of Xilinx UG071 "Virtex-4 Configuration Guide". I haven't seen any software support for this feature, so you may need to create your own tools for capturing and parsing the data. Also, I think the technique captures the entire FPGA, so readback may be too slow for your requirements.

The only other technique I can think of is to add extra logic to your design that shadows or reads out your BRAM contents, and sends it to the outside world through some I/O port.
 

    sohiltri

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sohiltri

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how can we take out around 170 bits output at one stroke... shud we stop processing for time bein usin enable/disable signal and then take output thru serial/parallel port to PC or is there some other way....
 

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A block RAM has configurable data port width, but it won't go wide enough to give you 170 bits at once, unless you have multiple parallel RAMs.

Each block RAM has two ports, so if you have a spare port, you could use it to read out the data you need, although it will take a few clock cycles to get 170 bits.

Or you could stop your processing for long enough to read out the data you need.

Or maybe you could install a shadow RAM. That's a duplicate RAM. You write your data simultaneously into both RAMs, and use the second port of the shadow RAM to monitor your data. However, you still can't transfer 170 bits at once.

The only way I see to grab more data at once is to use the readback capture technique. I've never used it, I don't know how well it works.
 

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Can we use chipscope tool or timing analyser tool available with xilinx to see internal signals of 170 bits.... how feasible would it be??
 

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