bjt current in bandgap reference

[blue_orangee]

bandgap layout

hi,I have one question:how to determine the bjt current in bandgap reference?I mean the current in PTAT
Have somebody the experience how to choose the collector current of PNP? and how's the mismatch?
Thanks

 

[erikl]

current mode bandgap

Depends on your requirements regarding
- noise level (lower with more current)
- bandGap output impedance (same behavior)
... traded against power consumption.

 

[diemilio]

bandgap reference

BJTs or Diodes have an exponential relation between Vbe (Vd) and the current across the junction. For bandgap references you want your output voltage to be as stable as possible, so yo probably want to bias your BJT (diode) with a current that sets the junction voltage in a region where variation is small (how small depends on your design specs).

Regards,

diemilio

Added after 3 minutes:

Mismatch depends on the way you layout your devices. There's always mismatch, but you can minimize it by using a layout topology completely symmetric. For Bandgap reference it is usually recommended to layout the small BJT in the middle, and make the larger BJT using n number blocks of the same size of the central BJT all around it.

Hope this helps,

diemilio

 

[blue_orangee]

bandgap reference best ratio

I just want to design a BGR works in low power supply (below 1 V),the noise specs is not important,temperature coefficent and its power dissipation are more important.

 

[erikl]

bipolar transistor characteristics, bandgap

Just to give you a hint: In our Bandgap Ref. we use 0.3uA thru the PNP diodes. (.18um process, 2.5V supply voltage).

 

[JPR]

bjt bandgap reference

There are many, many trade-offs for the current in the bandgap components.

POWER - Of course the most direct item impacted is power consumption.

AREA - In order to achieve lower current (power), you need bigger resistors.

ERROR TERMS - If you bias at too high of a current level the emitter and source resitances can impact your results. If you bias at too low of a current level and leakage currents can impact your results. Make sure you are in a region of good bipolar operation - and make sure it is a region that you understand (have good characterization information)

POWER SUPPLY REJECTION - Higher current levels will typically have higher bandwidth, which will help reject high frequency noise on your supplies.

NOISE - This is somewhat of a secondary effect, but can be a primary effect depending upon the design. IF the bandgap circuit itself sets the bandwidth, [total] noise should be roughly independant of current level. If you increase the current, the noise level per root hertz goes down, but the bandwidth goes up, leaving approximately the same noise level. However if the bandwith of interest is lower than the bandgap bandwidth (bandgap is followed by a filter, or used in a delta-sigma type ADC with a low bandwidth digital filter that might filter off bandgap noise impact, for examples), then increasing the current WILL decrease the noise.

 

[raduga_in]

bjt currents

@erikl

0.3uA ?? It is close to the leakage current and also will give a poor noise performance .. isn't it ?

Raduga

 

[erikl]

bipolar transistor leakage

@erikl

0.3uA ?? It is close to the leakage current and also will give a poor noise performance .. isn't it ?

Raduga

Of course the noise performance isn't very good, but it is for a sigma-delta ADC, so it doesn't matter too much (s. posting above). As to leakage current: we use 5V-tolerant transistors (higher Vt) at 2.5V vdd. 300nA is far above their leakage level. And low power consumption here has priority.

 

[raduga_in]

band-gap reference filtering

@erikl,

Have you taped out such design or is for academic purpose ? Coz I have serious doubts regarding these current levels. coz when you have say 1:24 ratio of bjts 0.3u/24 is like 12.5nA !! Not far from
leakage currents.

@blue_orangee

I have experience a poor performance of such architecture for mismatch. Just try changing widths of the current mirror transistor by say
1um and check the performance.

 

[erikl]

pnp bandgap reference in cmos technology

@erikl,

Have you taped out such design or is for academic purpose ? Coz I have serious doubts regarding these current levels. coz when you have say 1:24 ratio of bjts 0.3u/24 is like 12.5nA !! Not far from
leakage currents.

@raduga: The BGA works well on silicon since half a year. Our ratio is 1:8, and 40nA is still more than 3 orders of magnitude above their (room temperature) leakage current of about 10pA. IMHO this is far enough.

 

[raduga_in]

biasing bjts low current

@erikl,

Great ! Thats really good .. I don't see any reference for such a low current design in IEEE papers. Please let me know if you are using any specific source of reference for this.

Regards
Raduga

 

[erikl]

mismatched transistor of bjt

@raduga:

Own development (not mine), based on std. CMOS/pnp bandGap schematics. With a mature process technology, well proven simulation models and extensive pre- & postLayout simulations one can take a good chance on successful operation. And eventually the silicon conceded the point to us ;-)

 

[blue_orangee]

bipolar transistor-leakage currents

I try to use 1uA as bjt current in bandgap reference.

 

[erikl]

band gap, why bjt

I try to use 1uA as bjt current in bandgap reference.

I think this is a good compromise. We had to go to a lower current because of strict power save requirements. And due to Delta-Sigma technique, part of the (relatively high) noise could be transferred to frequency regions where it doesn't harm.

 

[leo_o2]

bjt current source ua

Yes, noise from BG will be suppressed by Delta-Sigma system in frequency domain.

 

[kishore2k4]

bjt bandgap reference pdf

Sorry for digging up a old thread but I thought it would be relevant.

Lets say you are using the standard current-mode CMOS bandgap reference topology. For a bias current of 1uA+1uA the value of R1 would be around 50K and R2 would be nearly 10-12 times of that around 500k. Aren't these resistor values quite high with significant impact on area?

@erikl: May I please know a bit more about your bandgap circuit.

Thank You,

 

[erikl]

pnp bandgap

Lets say you are using the standard current-mode CMOS bandgap reference topology. For a bias current of 1uA+1uA the value of R1 would be around 50K and R2 would be nearly 10-12 times of that around 500k. Aren't these resistor values quite high with significant impact on area?

S. the PDF below. This method can also be applied for a current-mode CMOS bandgap reference circuit in order to get along with lower resistance values.

@erikl: May I please know a bit more about your bandgap circuit.

No, sorry, this is company confidential. Hope for your comprehension!

 

[analog_prodigy]

Hi all,
Thanks to all.
This discussion helped me a lot in designing BGR.