bit_vector subtraction with constant function

[verilog2vhdl]

in which library do i get bit_vector subtraction with constant funtion??

can some one give me the code if possible...

the need is i have
SIGNAL O_cnt_xhdl1 : bit_vector(12 DOWNTO 0);

and i want to do

O_cnt_xhdl1 <= O_cnt_xhdl1 - "0000000000001";

I see the error as following in modelsim ...

No feasible entries for infix operator "-".

 

[vomit]

There is only the official IEEE library numeric_bit, all alternatives are non-standard

http://www.eda.org/rassp/vhdl/models/standards/numeric_bit.vhd

In this library there are the types unsigned and signed, both compatible with and easily convertible from the bit_vector type. Use a simple cast bit_vector(uns) or unsigned(bv).

After you have an unsigned (or signed) you can even do integer mathematics!

signal O_cnt_xhdl1 : unsigned(12 DOWNTO 0);
O_cnt_xhdl1 <= O_cnt_xhdl1 - 1;