wsu
Newbie level 1
display seven segment binary to decimal
Please help in displaying the output of 6-bit counter in decimal format instead of hexadecimal on the 2 seven segment displays of FPGA board.
Also VHDL code for the debounce of Virtex-II FPGA board from Insight IMPACT with clock speed of 100MHZ
Please help in displaying the output of 6-bit counter in decimal format instead of hexadecimal on the 2 seven segment displays of FPGA board.
Also VHDL code for the debounce of Virtex-II FPGA board from Insight IMPACT with clock speed of 100MHZ