Try and put at least 4u7 from the CT, centre tap, of the LV side to gnd, this wdg should be near the fets, this gives turn off current some where to go until it can reach the big electro's ( which have plenty of ESL )
Buffering that chip for gate drive is a good idea - otherwise you need to add good schottkies to the chip o/p - see data sheet and app notes for this device.
Any choke on the o/p will cause spikes in the diodes - hence snubbers needed - turning fets on slower helps alleviate this
put a back diode across the 30 ohm, schottky, to give a quicker turn off, leaving the 10E to each fet. Make sure the fets are well heatsunk.
Double up your Vout feedback ckt as well as other over volt stop protection
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Snubbers, for fets: 6.8E ( 2W diss, so 3 x 22 ohm 2W in parallel) and 15nF ( 200V ) across each fet - for 50kHz
diodes: 150pF 1500V ( or 2 x 330pf, 1kV in series ) and 1200 ohm ( 10 watt, so 5 x 6k8, 2W in // ) across each diode
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get rid of the 1uF to the drains ( that go to Vcc )
put 1uF across the 0.01E shunt ( right on it with short wires )