Mar 10, 2013 #1 A alokem Newbie level 6 Joined Feb 25, 2013 Messages 13 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,371 What should be the best multi VT optimization approach for leakage power optimization targating the usage of maximum no. of high VT cells without degrading timing ? 1) Low VT -> Std VT -> High VT 2) High VT -> Std VT -> Low VT or anyother approach ?
What should be the best multi VT optimization approach for leakage power optimization targating the usage of maximum no. of high VT cells without degrading timing ? 1) Low VT -> Std VT -> High VT 2) High VT -> Std VT -> Low VT or anyother approach ?
Mar 10, 2013 #2 M mail4idle2 Full Member level 4 Joined Oct 20, 2012 Messages 200 Helped 20 Reputation 40 Reaction score 19 Trophy points 1,298 Activity points 2,173 Close timing which high vt cells and see where ever timing critical try to use less vt cells.
Mar 10, 2013 #3 A alokem Newbie level 6 Joined Feb 25, 2013 Messages 13 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,371 mail4idle2 said: Close timing which high vt cells and see where ever timing critical try to use less vt cells. Click to expand... Will there be any area impact due to usage of high vt cells ?
mail4idle2 said: Close timing which high vt cells and see where ever timing critical try to use less vt cells. Click to expand... Will there be any area impact due to usage of high vt cells ?
Mar 11, 2013 #4 O OhaAmo Member level 4 Joined Mar 4, 2012 Messages 75 Helped 7 Reputation 14 Reaction score 7 Trophy points 1,288 Activity points 1,685 Yes. Using only low Vt will require buffers insertion and other compensations methods for timing closure.
Yes. Using only low Vt will require buffers insertion and other compensations methods for timing closure.
Mar 11, 2013 #5 K kumar_eee Advanced Member level 3 Joined Sep 22, 2004 Messages 814 Helped 139 Reputation 276 Reaction score 113 Trophy points 1,323 Location Bangalore,India Activity points 4,677 HVT -> High Delay and Less Leakage LVT -> Less Delay and High Leakage The approach is, use only HVT from Synthesis to Route. Allow LVT cells only after Post-Route Optimization, this will have less overall leakage. Again, it depends on the design & varies from design to design.
HVT -> High Delay and Less Leakage LVT -> Less Delay and High Leakage The approach is, use only HVT from Synthesis to Route. Allow LVT cells only after Post-Route Optimization, this will have less overall leakage. Again, it depends on the design & varies from design to design.